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參數(shù)資料
| 型號： | MAX2101CMQ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | 16-Bit Buffers/Drivers With 3-State Outputs 48-TSSOP -40 to 85 |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | METRIC, QFP-100 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 217K |
| 代理商： | MAX2101CMQ |
Each baseband is filtered by an internal 5th-order
Butterworth lowpass filter. The on-board lowpass filters
have an externally variable bandwidth of 10MHz to
30MHz. Each baseband is then converted by a 6-bit
analog-to-digital converter (ADC). The conversion result
is stored in a register and is output using the data
clock. See Figure 2 for the relation between baseband
signal, sample and data clock, and digitized data. The
external master clock is internally divided by six and is
available at RCLK for external system functions, fre-
quency synthesizers, etc. See Figures 3 and 4 for func-
tional diagrams.
IF Input Port (IFIN,
IFINB
)
The MAX2101 provides a balanced IF input. The inputs
are self-biasing, so the input signals should be AC termi-
nated, depending on system requirements. To minimize
noise, the unused input should be AC terminated with
25
. To minimize distortion, AC terminate the unused
input with a 50
resistor.
V CO Resonator T ank Ports
(T NK A, T NK B) and Presc aler
The MAX2101 integrates a negative impedance oscilla-
tor with balanced inputs. Use a parallel tank network,
as shown in Figure 5. The phase-noise performance of
the oscillator near the carrier is dominated by the reso-
nant network. The resonant inductor must have a suffi-
ciently high Q and a self-resonant frequency (SRF) that
is more than twice the intended LO frequency. Be sure
to minimize parasitic elements surrounding the tank
network by using proper layout techniques. See the
Applications Informationsection.
The VCO prescaler output provides phase-lock loop
capability for controlling the VCO frequency. The
prescaler generates the VCO frequency divided by 16.
As a result, the prescaler delivers a 25MHz to
43.75MHz signal over the VCO operating frequency
range of 400MHz to 700MHz. The differential outputs
should have equivalent termination.
M
6-Bit Quadrature Digitizer
_______________________________________________________________________________________
9
_______Pin Desc ription (c ontinued)
PIN
NAME
FUNCTION
78
BBINI
I Channel Baseband Amplifier,
External Input
79
VGNDI
I Channel Baseband Ground
80
VREFIN
High Impedance, connect to VREF
(pin 88)
81
84
85
86
87
MIXOUTI
VSUBRF
PWRI
2R5
VCCIF
I Channel Mixer Output
RF Demodulator Substrate
I Channel Power Indicator
2x VREF Output
IF Signal Processing +5V Supply
88
VREF
Bandgap Reference Voltage
Output
90
91
93
94
95
96
97
100
IFIN
IFINB
AGC
VGNDIF
FLTRSEL
PWRQ
VPTAT
MIXOUTQ
IF Amplifier Noninverting Input
IF Amplifier Inverting Input
Automatic Gain Control Input
IF Signal-Processing Ground
Baseband Signal Path Select
Q Channel Power Indicator
PTAT Reference Voltage Output
Q Channel Mixer Output
______________Detailed Desc ription
The MAX2101 6-bit quadrature digitizer solves one of
the most challenging problems of high dynamic range
digital-receiver design by combining quadrature
demodulation and analog-to-digital (A/D) conversion in
a single device. The MAX2101’s unique RF-to-Bits
function bridges the gap between RF downconverters
and CMOS digital signal processors (DSPs). Figure 1
is a simplified connection diagram.
The MAX2101 accepts input signals from 400MHz to
700MHz and applies gain depending on the input
amplitude. The signal is then split and downconverted
to baseband by two mixers, which are driven by two
local oscillator (LO) signals in quadrature. An internal
voltage-controlled oscillator (VCO) feeds the two LOs.
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