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| 型號： | M80C186EB-13 |
| 廠商： | Intel Corp. |
| 英文描述： | 16-Bit High-Integration Embedded Processor(16位高集成嵌入式處理器) |
| 中文描述： | 16位高性能嵌入式處理器集成（16位高集成嵌入式處理器） |
| 文件頁數(shù)： | 17/56頁 |
| 文件大?。?/td> | 855K |
| 代理商： | M80C186EB-13 |
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M80C186EB
Table 4. M80C186EB Pin Descriptions
(Continued)
Name
Type
Description
HOLD
I
HOLD
request input to signal that an external bus master wishes to gain
control of the local bus. The M80C186EB will relinquish control of the local
bus between instruction boundaries not conditioned by a LOCK prefix.
A(L)
HLDA
O
HoLD Acknowledge
output to indicate that the M80C186EB has relinquish
control of the local bus. When HLDA is asserted, the M80C186EB will (or
has) floated its data bus and control signals allowing another bus master to
drive the signals directly.
H(1)
R(0)
P(0)
NCS
O
Numerics Coprocessor Select
output is generated when accessing a
numerics coprocessor.
H(1)
R(1)
P(1)
ERROR
I
ERROR
input that indicates the last numerics coprocessor operation
resulted in an exception condition. An interrupt TYPE 16 is generated if
ERROR is sampled active at the beginning of a numerics operation.
A(L)
PEREQ
I
CoProcessor REQuest
signals that a data transfer between an External
Numerics Coprocessor and Memory is pending.
A(L)
UCS
O
Upper Chip Select
will go active whenever the address of a memory or I/O
bus cycle is within the address limitations programmed by the user. After
reset, UCS is configured to be active for memory accesses between
0FFC00H and 0FFFFFH.
H(1)
R(1)
P(1)
LCS
O
Lower Chip Select
will go active whenever the address of a memory bus
cycle is within the address limitations programmed by the user. LCS is
inactive after a reset.
H(1)
R(1)
P(1)
P1.0/GCS0
P1.1/GCS1
P1.2/GCS2
P1.3/GCS3
P1.4/GCS4
P1.5/GCS5
P1.6/GCS6
P1.7/GCS7
O
These pins provide a multiplexed function. If enabled, each pin can provide
a
Generic Chip Select
output which will go active whenever the address of
a memory or I/O bus cycle is within the address limitations programmed by
the user. When not programmed as a Chip-Select, each pin may be used as
a general purpose output
Port.
As an output port pin, the value of the pin
can be read internally.
H(X)/H(1)
R(1)
P(X)/P(1)
T0OUT
T1OUT
O
Timer OUTput
pins can be programmed to provide a single clock or
continuous waveform generation, depending on the timer mode selected.
H(Q)
R(1)
P(Q)
T0IN
T1IN
I
Timer INput
is used either as clock or control signals, depending on the
timer mode selected.
A(L)
A(E)
17
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PDF描述 |
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| M80C186EB-16 | 16-Bit High-Integration Embedded Processor(16位高集成嵌入式處理器) |
| M80C186EB-8 | 16-Bit High-Integration Embedded Processor(16位高集成嵌入式處理器) |
| M80C186 | CHMOS HIGH INTEGRATION 16-BIT MICROPROCESSOR |
| M80C186XL10 | 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
| M80C186XL12 | 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M80C186EB-16 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
| M80C186EB-8 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
| M80C186XL10 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
| M80C186XL12 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
| M80C186XL16 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR |
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