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參數(shù)資料
| 型號： | M80287 |
| 廠商： | Intel Corp. |
| 英文描述： | 80-BIT HMOS* NUMERIC PROCESSOR EXTENSION |
| 中文描述： | 80位的保健組織*數(shù)值處理器擴(kuò)展 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 399K |
| 代理商： | M80287 |
M80287
271029–13
Figure 8a. Protected Mode Instruction and Data Pointer Image in Memory
Denormalized Operand:
At least one of the oper-
ands is denormalized; it has the smallest exponent
but a non-zero significand. Normal processing con-
tinues if this exception is masked off.
Inexact Result:
If the true result is not exactly repre-
sentable in the specified format, the result is round-
ed according to the rounding mode, and this flag is
set. If this exception is masked, processing will sim-
ply continue.
If the error is not masked, the corresponding error
bit and the error status bit (ES) in the control word
will be set, and the ERROR output signal will be as-
serted. If the CPU attempts to execute another ESC
or WAIT instruction, exception 7 will occur.
The error condition must be resolved via an interrupt
service routine. The M80287 saves the address of
the floating point instruction causing the error as well
as the address of the lowest memory location of any
memory operand required by that instruction.
M8086/20 COMPATIBILITY
M80286/20 supports portability of M8086/20 pro-
grams when it is in the real address mode. However,
because of differences in the numeric error handling
techniques, error handling routines may need to be
changed. The differences between an M80286/20
and M8086/20 are:
1. The NPX error signal does not pass through an
interrupt controller (M8087 INT signal does).
Therefore, any interrupt controller oriented instruc-
tions for the M8086/20 may have to be deleted.
2. Interrupt vector 16 must point at the numeric error
handler routine.
3. The saved floating point instruction address in the
M80287 includes any leading prefixes before the
ESCAPE opcode. The corresponding saved address
of the M8087 does not include leading prefixes.
4. In protected mode, the format of the saved in-
struction and operand pointers is different than for
the M8087. The instruction opcode is not savedDit
must be read from memory if needed.
5. Interrupt 7 will occur when executing ESC instruc-
tions with either TS or EM of MSW
e
1. If TS of
MSW
e
1 then WAIT will also cause interrupt 7. An
interrupt handler should be added to handle this situ-
ation.
6. Interrupt 9 will occur if the second or subsequent
words of a floating point operand fall outside a seg-
ment’s size. Interrupt 13 will occur if the starting ad-
dress of a numeric operand falls outside a seg-
ment’s size. An interrupt handler should be added to
report these programming errors.
In the protected mode, M8086/20 application code
can be directly ported via recompilation if the 286
memory protection rules are not violated.
19
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