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參數(shù)資料
| 型號： | M80287 |
| 廠商： | Intel Corp. |
| 英文描述： | 80-BIT HMOS* NUMERIC PROCESSOR EXTENSION |
| 中文描述： | 80位的保健組織*數(shù)值處理器擴(kuò)展 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大小： | 399K |
| 代理商： | M80287 |
M80287
271029–12
NOTE:
The index i of tag(i) is not top-relative. A program typically uses the ‘‘top’’ field of Status Word to determine which tag(i)
field refers to logical top of stack.
Figure 7. M80287 Tag Word
Table 5b. Condition Code Interpretation After
FPREM Instruction As a Function of
Dividend Value
Dividend Range
Q
2
Q
1
Q
0
Dividend
k
2
*
Modulus
Dividend
k
4
*
Modulus
Dividend
t
4
*
Modulus
C
3
C
3
Q
2
C
1
Q
1
Q
1
Q
0
Q
0
Q
NOTE:
1. Previous value of indicated bit, not affected by FPREM
instruction execution.
The saved instruction address in the M80287 will
point at any prefixes which preceded the instruction.
This is different than in the M8087 which only point-
ed at the ESCAPE instruction opcode.
Control Word
The NPX provides several processing options which
are selected by loading a word from memory into the
control word. Figure 9 shows the format and encod-
ing of fields in the control word.
The low order byte of this control word configures
the M80287 error and exception masking. Bits 5–0
of the control word contain individual masks for each
of the six exceptions that the M80287 recognizes.
The high order byte of the control word configures
the M80287 operating mode including precision,
rounding, and infinity control. The precision control
bits (bits 9–8) can be used to set the M80287 inter-
nal operating precision at less than the default of
temporary real (80-bit) precision. This can be useful
in providing compatibility with the early generation
arithmetic processors of smaller precision than the
M80287. The rounding control bits (bits 11–10) pro-
vide for directed rounding and true chop as well as
the unbiased round to nearest even mode specified
in the IEEE standard. Control over closure of the
number space at infinity is also provided (either af-
fine closure:
g
%
, or projective closure:
%
, is treat-
ed as unsigned, may be specified).
EXCEPTION HANDLING
The M80287 detects six different exception condi-
tions that can occur during instruction execution.
Any or all exceptions will cause the assertion of
ERROR signal if the appropriate exception masks
are not set.
The exceptions that the M80287 detects and the
‘default’ procedures that will be carried out if the ex-
ception is masked, are as follows:
Invalid Operation:
Stack overflow, stack underflow,
indeterminate form (0/0,
%
–
%
, etc.) or the use of a
Non-Number (NAN) as an operand. An exponent
value of all ones and non-zero significand is re-
served to identify NANs. If this exception is masked,
the M80287 default response is to generate a spe-
cific NAN called INDEFINITE, or to propagate al-
ready existing NANs as the calculation result.
Overflow:
The result is too large in magnitude to fit
the specified format. The M80287 will generate an
encoding for infinity if this exception is masked.
Zero Divisor:
The divisor is zero while the dividend
is a non-infinite, non-zero number. Again, the
M80287 will generate an encoding for infinity if this
exception is masked.
Underflow:
The result is non-zero but too small in
magnitude to fit in the specified format. If this excep-
tion is masked the M82087 will denormalize (shift
right) the fraction until the exponent is in range. The
process is called gradual underflow.
18
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