參數(shù)資料
型號(hào): M5M4V64S20ATP-10L
廠商: Mitsubishi Electric Corporation
英文描述: 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
中文描述: 64M號(hào)(4銀行甲4194304字× 4位)同步DRAM
文件頁(yè)數(shù): 27/48頁(yè)
文件大?。?/td> 1097K
代理商: M5M4V64S20ATP-10L
M5M4V64S20ATP-8, -10, -12
Jan'97
Preliminary
MITSUBISHI LSIs
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev.0.2)
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70°C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, Output Open, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, unless otherwise noted)
I
I
Symbol
Parameter
Test Conditions
Limits
Unit
Min.
Max.
VOH (DC)
High-Level Output Voltage (DC)
IOH=-2mA
2.4
V
VOL (DC)
Low-Level Output Voltage (DC)
IOL= 2mA
0.4
V
IOZ
Off-state Output Current
Q floating VO=0 ~ VddQ
-10
10
μA
Input Current
VIH = 0 ~ VddQ+0.3V
-10
10
μA
Symbol
Parameter
Test Conditions
Limits (max)
Unit
125
MHz
100
MHz
83
MHz
Icc1s
operating current, single bank
tRC=min, tCLK=min, BL=1, CL=3
95
85
75
mA
Icc1d
operating current, dual bank
tRC=min, tCLK=min, BL=1, CL=3
130
115
105
mA
Icc2h
standby current, CKE=H
all banks idle, tCLK=min
mA
Icc2l
standby current, CKE=L
all banks idle, tCLK=min
2
2
2
mA
Icc3h
active standby current, CKE=H
all banks active, tCLK=min
50
45
40
mA
Icc3l
active standby current, CKE=L
all banks active, tCLK=min
2
2
2
mA
Icc4
burst current
all banks active, tCLK=min, BL=4,
CL=3
mA
Icc5
auto-refresh current
tRC=min, tCLK=min
130
115
105
mA
Icc6
self-refresh current
CKE <0.2v
1
1
1
mA
27
130
115
105
25
22
20
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