- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370973 > M5M4V64S20ATP-10L (Mitsubishi Electric Corporation) 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | M5M4V64S20ATP-10L |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| 中文描述： | 64M號（4銀行甲4194304字× 4位）同步DRAM |
| 文件頁數(shù)： | 21/48頁 |
| 文件大小： | 1097K |
| 代理商： | M5M4V64S20ATP-10L |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
M5M4V64S20ATP-8, -10, -12
Jan'97
Preliminary
MITSUBISHI LSIs
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev.0.2)
[ Write Interrupted by Precharge ]
Burst write operation can be interrupted by precharge of
the same bank
. Random column access is al-
lowed. Write recovery time (tWR) is required from the last data to PRE command.
Write Interrupted by Precharge (BL=4)
[ Write Interrupted by Burst Terminate ]
Burst terminate command can terminate burst write operation. In this case, the write recovery time is not
required and the bank remains active. The figure below shows the case 3 words of data are written. Random
column access is allowed. WRITE to TERM interval is minimum 1 CLK.
CLK
Command
A0-9
A10
BA0,1
DQ
Write
Yi
0
00
PRE
0
00
DQM
ACT
Xb
Xb
00
tWR
tRP
A11
Xb
Dai0
Dai1
Dai2
Command
Write Interrupted by Burst Terminate (BL=4)
CLK
A0-9
A10
BA0,1
DQ
Write
Yi
0
00
DQM
Dai0
Dai1
Dai2
A11
Write
Yj
0
00
Daj0
Daj1
Daj2
Daj3
TERM
21
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M5M4V64S20ATP-12 | 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8 | 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8A | 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8L | 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M51008KR-10L | 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V64S20ATP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。