參數(shù)資料
型號： M58WR064EB85ZB6T
廠商： NUMONYX
元件分類： PROM
英文描述： 4M X 16 FLASH 1.8V PROM, 85 ns, PBGA56
封裝： 7.70 X 9 MM, 0.75 MM PITCH, VFBGA-56
文件頁數(shù)： 7/81頁
文件大?。?/td> 539K
代理商： M58WR064EB85ZB6T
15/81
M58WR064ET, M58WR064EB
by issuing the Block Lock, Block Lock-Down or
Protection Register Program commands. Only the
blocks not being erased may be read or pro-
grammed correctly. When the Program/Erase Re-
sume command is issued the operation will
complete. Refer to the Dual Operations section for
detailed information about simultaneous opera-
tions allowed during Program/Erase Suspend.
During a Program/Erase Suspend, the device can
be placed in standby mode by taking Chip Enable
to VIH. Program/Erase is aborted if Reset turns to
VIL.
See Appendix C, Figure 22, Program Suspend &
Resume Flowchart and Pseudo Code, and Figure
24, Erase Suspend & Resume Flowchart and
Pseudo Code for flowcharts for using the Program/
Erase Suspend command.
Program/Erase Resume Command
The Program/Erase Resume command can be
used to restart the Program/Erase Controller after
a Program/Erase Suspend command has paused
it. One Bus Write cycle is required to issue the
command. The command can be written to any
address.
The Program/Erase Resume command does not
change the read mode of the banks. If the sus-
pended bank was in Read Status Register, Read
Electronic signature or Read CFI Query mode the
bank remains in that mode and outputs the corre-
sponding data. If the bank was in Read Array
mode subsequent read operations will output in-
valid data.
If a Program command is issued during a Block
Erase Suspend, then the erase cannot be re-
sumed until the programming operation has com-
pleted. It is possible to accumulate suspend
operations. For example: suspend an erase oper-
ation, start a programming operation, suspend the
programming operation then read the array. See
Appendix C, Figure 22, Program Suspend & Re-
sume Flowchart and Pseudo Code, and Figure 24,
Erase Suspend & Resume Flowchart and Pseudo
Code for flowcharts for using the Program/Erase
Resume command.
Protection Register Program Command
The Protection Register Program command is
used to Program the 128 bit user One-Time-Pro-
grammable (OTP) segment of the Protection Reg-
ister and the Protection Register Lock. The
segment is programmed 16 bits at a time. When
shipped all bits in the segment are set to ‘1’. The
user can only program the bits to ‘0’.
Two write cycles are required to issue the Protec-
tion Register Program command.
s
The first bus cycle sets up the Protection
Register Program command.
s
The second latches the Address and the Data to
be written to the Protection Register and starts
the Program/Erase Controller.
Read operations output the Status Register con-
tent after the programming has started.
The segment can be protected by programming bit
1 of the Protection Lock Register. Bit 1 of the Pro-
tection Lock Register also protects bit 2 of the Pro-
tection Lock Register. Programming bit 2 of the
Protection Lock Register will result in a permanent
protection of Parameter Block #0 (see Figure 5,
Security Block and Protection Register Memory
Map). Attempting to program a previously protect-
ed Protection Register will result in a Status Reg-
ister error. The protection of the Protection
Register and/or the Security Block is not revers-
ible.
The Protection Register Program cannot be sus-
pended. See Appendix C, Figure 26, Protection
Register Program Flowchart and Pseudo Code,
for a flowchart for using the Protection Register
Program command.
Set Configuration Register Command.
The Set Configuration Register command is used
to write a new value to the Burst Configuration
Control Register which defines the burst length,
type, X latency, Synchronous/Asynchronous Read
mode and the valid Clock edge configuration.
Two Bus Write cycles are required to issue the Set
Configuration Register command.
s
The first cycle writes the setup command and
the address corresponding to the Configuration
Register content.
s
The second cycle writes the Configuration
Register data and the confirm command.
Once the command is issued the memory returns
to Read mode.
The value for the Configuration Register is always
presented on A0-A15. CR0 is on A0, CR1 on A1,
etc.; the other address bits are ignored.
Block Lock Command
The Block Lock command is used to lock a block
and prevent Program or Erase operations from
changing the data in it. All blocks are locked at
power-up or reset.
Two Bus Write cycles are required to issue the
Block Lock command.
s
The first bus cycle sets up the Block Lock
command.
s
The second Bus Write cycle latches the block
address.
The lock status can be monitored for each block
using the Read Electronic Signature command.
Table. 13 shows the Lock Status after issuing a
Block Lock command.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M58WR064EBZB 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
M58WR064ET 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
M58WR064ET10ZB6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
M58WR064ET70ZB6T 功能描述:閃存 64M (4Mx16) 70ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
M58WR064ET80ZB6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
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