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參數(shù)資料
| 型號： | M52277EVB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 46/46頁 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO FOR MCF5227 |
| 標準包裝： | 1 |
| 系列： | ColdFire® |
| 類型： | MCU |
| 適用于相關產品： | MCF52277 |
| 所含物品： | 板 |
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Pin Assignments and Reset States
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
9
4
Pin Assignments and Reset States
4.1
Signal Multiplexing
The following table lists all the MCF5227x pins grouped by function. The direction column is the direction for the primary
function of the pin only. Refer to Section 4, “Pin Assignments and Reset States,” for package diagrams. For a more detailed
discussion of the MCF5227x signals, consult the MCF52277 Reference Manual (MCF52277RM).
NOTE
In this table and throughout this document a single signal within a group is designated
without square brackets (i.e., FB_A23), while designations for multiple signals within a
group use brackets (i.e., FB_A[23:21]) and is meant to include all signals within the two
bracketed numbers when these numbers are separated by a colon.
NOTE
The primary functionality of a pin is not necessarily its default functionality. Most pins that
are muxed with GPIO will default to their GPIO functionality. See Table 5 for a list of the
exceptions.
Table 5. Special-Case Default Signal Functionality
Pin
Default Signal
FB_BE/BWE[3:0]
FB_CS[3:0]
FB_OE
FB_TA
FB_R/W
FB_TS
Table 6. MCF5227x Signal Information and Muxing
Signal Name
GPIO
Alternate 1
Alternate 2
Pull-up
(U)
1
Pull-do
w
n
(D)
Di
re
c
tio
n
2
V
o
lt
a
g
e
Domain
MCF52274
176 LQFP
MCF52277
196 MAPBGA
Reset
RESET
—
U
I
EVDD
103
J11
RSTOUT
——
—
O
EVDD
102
K11
Clock
EXTAL
—
I
EVDD
106
F14
XTAL
—
U3
O
EVDD
105
G14
Mode Selection
BOOTMOD[1:0]
—
I
EVDD
110, 109
G10, H10
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