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參數(shù)資料
| 型號(hào)： | M48T513V-70CS1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO32 |
| 封裝： | 10 X 20 MM, PLASTIC, TSOP2-32 |
| 文件頁數(shù)： | 8/30頁 |
| 文件大?。?/td> | 161K |
| 代理商： | M48T513V-70CS1 |
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M48T513Y, M48T513V
16/30
Calibrating the Clock
The M48T513Y/V is driven by a quartz controlled
oscillator with a nominal frequency of 32,768Hz.
The devices are factory calibrated at 25
°C and
tested for accuracy. Clock accuracy will not ex-
ceed 35 ppm (parts per million) oscillator frequen-
cy error at 25
°C, which equates to about * 1.53
minutes per month (see Figure 14 on page 17).
When the Calibration circuit is properly employed,
accuracy improves to better than 4 ppm at 25
°C.
The oscillation rate of crystals changes with tem-
perature. The M48T513Y/V design employs peri-
odic counter correction. The calibration circuit
adds or subtracts counts from the oscillator divider
circuit at the divide by 256 stage, as shown in Fig-
ure 15, page 17.
The number of times pulses which are blanked
(subtracted, negative calibration) or split (added,
positive calibration) depends upon the value load-
ed into the five Calibration bits found in the Control
Register. Adding counts speeds the clock up, sub-
tracting counts slows the clock down. The Calibra-
tion bits occupy the five lower order bits (D4-D0) in
the Control Register 7FFF8h. These bits can be
set to represent any value between 0 and 31 in bi-
nary form. Bit D5 is a Sign bit; ’1’ indicates positive
calibration, ’0’ indicates negative calibration. Cali-
bration occurs within a 64 minute cycle. The first
62 minutes in the cycle may, once per minute,
have one second either shortened by 128 or
lengthened by 256 oscillator cycles.
If a binary ’1’ is loaded into the register, only the
first 2 minutes in the 64 minute cycle will be modi-
fied; if a binary 6 is loaded, the first 12 will be af-
fected, and so on. Therefore, each calibration step
has the effect of adding 512 or subtracting 256 os-
cillator cycles for every 125, 829, 120 actual oscil-
lator cycles, that is +4.068 or –2.034 ppm of
adjustment per calibration step in the calibration
register. Assuming that the oscillator is running at
exactly 32,768Hz, each of the 31 increments in the
Calibration byte would represent +10.7 or –5.35
seconds per month which corresponds to a total
range of +5.5 or –2.75 minutes per month. Figure
15, page 17 illustrates a TIMEKEEPER calibration
waveform.
Two methods are available for ascertaining how
much calibration a given M48T513Y/V may re-
quire. The first involves setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference and recording deviation over a fixed
period of time.
Calibration values, including the number of sec-
onds lost or gained in a given period, can be found
in the application note “AN934, TIMEKEEPER
CALIBRATION.”
This allows the designer to give the end user the
ability to calibrate the clock as the environment re-
quires, even if the final product is packaged in a
non-user serviceable enclosure. The designer
could provide a simple utility that accesses the
Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT pin. The pin will toggle at 512Hz, when the
Stop bit (ST, D7 of 7FFF9h) is ’0’, the Frequency
Test bit (FT, D6 of 7FFFCh) is ’1’, the Alarm Flag
Enable bit (AFE, D7 of 7FFF6h) is ’0’, and the
Watchdog Steering bit (WDS, D7 of 7FFF7h) is ’1’
or the Watchdog Register (7FFF7h = 0) is reset.
Note: A 4 second settling time must be allowed
before reading the 512Hz output.
Any deviation from 512Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature.
For
example,
a
reading
of
512.010124Hz would indicate a +20 ppm oscillator
frequency error, requiring a –10 (WR001010) to be
loaded into the Calibration Byte for correction.
Note that setting or changing the Calibration Byte
does not affect the Frequency test output frequen-
cy.
The IRQ/FT pin is an open drain output which re-
quires a pull-up resistor for proper operation. A
500-10k
resistor is recommended in order to
control the rise time. The FT bit is cleared on pow-
er-up.
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| M50944-XXXSP | 8-BIT, MROM, 4.3 MHz, MICROCONTROLLER, PDIP64 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T513V-70PM1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V-85CS1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V-85PM1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513VPM | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513VSH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
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