參數(shù)資料
型號(hào)： M48T513V-70CS1
廠商： STMICROELECTRONICS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 0 TIMER(S), REAL TIME CLOCK, PDSO32
封裝： 10 X 20 MM, PLASTIC, TSOP2-32
文件頁(yè)數(shù)： 2/30頁(yè)
文件大?。?/td> 161K
代理商： M48T513V-70CS1
M48T513Y, M48T513V
10/30
Write Mode
The M48T513Y/V is in the Write Mode whenever
W (Write Enable) and E (Chip Enable) are low
state after the address inputs are stable.
The start of a write is referenced from the latter oc-
curring falling edge of W or E. A write is terminated
by the earlier rising edge of W or E. The addresses
must be held valid throughout the cycle. E or W
must return high for a minimum of tEHAX from Chip
Enable or tWHAX from Write Enable prior to the ini-
tiation of another read or write cycle. Data-in must
be valid tDVWH prior to the end of write and remain
valid for tWHDX afterward. G should be kept high
during write cycles to avoid bus contention; al-
though, if the output bus has been activated by a
low on E and G a low on W will disable the outputs
tWLQZ after W falls.
Figure 9. Write Enable Controlled, Write AC Waveforms
Figure 10. Chip Enable Controlled, Write AC Waveforms
AI02382
tAVAV
tWHAX
tDVWH
DATA INPUT
A0-A16
E
W
DQ0-DQ7
VALID
tAVWH
tAVEL
tWLWH
tAVWL
tWLQZ
tWHDX
tWHQX
AI02582
tAVAV
tEHAX
tDVWH
A0-A16
E
W
DQ0-DQ7
VALID
tAVEL
tAVWL
tELEH
tWHDX
DATA INPUT
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參數(shù)描述
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M48T513V-85CS1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM
M48T513V-85PM1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM
M48T513VPM 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM
M48T513VSH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM
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