參數(shù)資料
型號(hào): M44C890-H
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Low-Current Microcontroller for Wireless Communication
中文描述: 4-BIT, EEPROM, MICROCONTROLLER, PDSO20
封裝: SSO-20
文件頁(yè)數(shù): 30/63頁(yè)
文件大?。?/td> 503K
代理商: M44C890-H
M44C890
M44C090
Rev.A4, 14-Dec-01
30 (63)
Mode 2: 8-bit compare counter with 4-bit programmable prescaler
4-bit counter
4-bit compare
RES
4-bit register
CM1
POUT
8-bit counter
8-bit compare
8-bit register
OVF2
CM2
RES
T2RM
T2OTM
Timer 2
output mode
and T2OTM
bit
T2IM
T2CTM
TOG2
INT4
CL2/1
13778
DCG
T2D1, 0
DCGO
Figure 31. 8-bit compare counter
The 4-bit stage is used as programmable prescaler for the
8-bit counter stage. In this mode, a duty-cycle stage is also
available. This stage can be used as an additional 2-bit
prescaler or for generating duty cycles of 25%, 33% and
50%. The 4-bit compare output (CM1) supplies the clock
output (POUT) with clocks.
Mode 3/4: 8-bit compare counter and 4-bit program-
mable prescaler
In these modes the 4-bit and the 8-bit counter stages work
independently as a 4-bit prescaler and an 8-bit timer with
an 2-bit prescaler or as a duty-cycle generator. Only in the
mode 3 and mode 4, can the 8-bit counter be supplied via
the external clock input (T2I) which is selected via the
P4CR register. The 4-bit prescaler is started via activating
of mode 3 and stopped and reset in mode 4. Changing
mode 3 and 4 has no effect for the 8-bit timer stage. The
4-bit stage can be used as prescaler for the SSI or to
generate the stop signal for modulator 2.
4-bit counter
4-bit compare
RES
4-bit register
8-bit counter
8-bit compare
8-bit register
OVF2
CM2
RES
T2RM
T2OTM
Timer 2
output mode
and T2OTM
bit
T2IM
T2CTM
TOG2
INT4
CL2/2
13779
DCG
T2D1, 0
DCGO
P41M2, 1
P4CR
CM1
POUT
CL2/1
MUX
T1OUT
SYSCL
SCL
T2CS1, 0
SYSCL
T2I
Figure 32. 4-/8-bit compare counter
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