參數(shù)資料
型號： M38K07M4L-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 43/133頁
文件大?。?/td> 1359K
代理商： M38K07M4L-XXXHP
38K0 Group
Rev.3.00
Oct 05, 2006
page 17 of 129
REJ03B0192-0300
Fig. 13 Interrupt control
Fig. 14 Structure of interrupt-related registers
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
b7
b0
Interrupt edge selection register
INT0 interrupt edge selection bit
Not used (return “0” when read)
INT1 interrupt edge selection bit
Not used (return “0” when read)
(INTEDGE : address 0FF316)
Interrupt request register 1
USB bus reset interrupt request bit
USB SOF interrupt request bit
USB device interrupt request bit
EXB interrupt request bit
INT0 interrupt request bit
Timer X interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Interrupt control register 1
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ1 : address 003C16)
(ICON1 : address 003E16)
Interrupt request register 2
INT1 interrupt request bit
Nothing is arranged for this bit. This is a
write disabled bit. When this bit is read
out, the contents are “0”.
Serial I/O receive interrupt request bit
Serial I/O transmit interrupt request bit
CNTR0 interrupt request bit
Key-on wake-up interrupt request bit
A/D conversion interrupt request bit
Nothing is arranged for this bit. This is a
write disabled bit. When this bit is read
out, the contents are “0”.
(IREQ2 : address 003D16)
Interrupt control register 2
0 : Interrupts disabled
1 : Interrupts enabled
(ICON2 : address 003F16)
0 : Falling edge active
1 : Rising edge active
b7
b0
b7
b0
b7
b0
b7
b0
USB bus reset interrupt enable bit
USB SOF interrupt enable bit
USB device interrupt enable bit
EXB interrupt enable bit
INT0 interrupt enable bit
Timer X interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
INT1 interrupt enable bit
Fix this bit to “0”.
Serial I/O receive interrupt enable bit
Serial I/O transmit interrupt enable bit
CNTR0 interrupt enable bit
Key-on wake-up interrupt enable bit
A/D conversion interrupt enable bit
Fix this bit to “0”.
“0” can be set by software, but “1”
cannot be set.
“0” can be set by software, but “1”
cannot be set.
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