參數(shù)資料
型號: M38C59GFHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù): 31/71頁
文件大小: 939K
代理商: M38C59GFHP
Rev.2.00
Nov 23, 2005
page 37 of 75
REJ03B0098-0200
38C5 Group (One Time PROM version)
[Transmit Buffer Register/Receive Buffer Reg-
ister (TB/RB)]
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer is write-only and the
receive buffer is read-only. If a character bit length is 7 bits, the MSB
of data stored in the receive buffer is “0”.
[Serial I/O1 Status Register (SIO1STS)]
The read-only serial I/O1 status register consists of seven flags (bits
0 to 6) which indicate the operating status of the serial I/O function
and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is set to “0” when the receive buffer
register is read.
If there is an error, it is detected at the same time that data is trans-
ferred from the receive shift register to the receive buffer register,
and the receive buffer full flag is set. A write to the serial I/O1 status
register sets all the error flags OE, PE, FE, and SE (bit 3 to bit 6,
respectively) to “0”. Writing “0” to the serial I/O1 enable bit SIOE (bit
7 of the serial I/O1 control register) also sets all the status flags to
“0”, including the error flags.
All bits of the serial I/O1 status register are set to “0” at reset, but if
the transmit enable bit (bit 4) of the serial I/O1 control register has
been set to “1”, the transmit shift completion flag (bit 2) and the trans-
mit buffer empty flag (bit 0) become “1”.
[Serial I/O1 Control Register (SIO1CON)]
The serial I/O1 control register consists of eight control bits for the
serial I/O1 function.
[UART Control Register (UARTCON)]
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set the
data format of an data transfer and one bit (bit 4) which is always
valid and sets the output structure of the P41/TXD pin.
[Baud Rate Generator (BRG)]
The baud rate generator determines the baud rate for serial transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate generator.
sNotes on serial I/O1
When setting transmit enable bit of serial I/O1 to “1”, the serial I/O1
transmit interrupt request bit is automatically set to “1”. When not
requiring the interrupt occurrence synchronous with the transmision
enabled, take the following sequence.
Set the serial I/O1 transmit interrupt enable bit to “0” (disabled).
Set the transmit enable bit to “1”.
Set the serial I/O1 transmit interrupt request bit to “0” after 1 or
more instructions have been executed.
Set the serial I/O1 transmit interrupt enable bit to “1” (enabled).
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