參數(shù)資料
型號(hào)： M38C59GFHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 28/71頁(yè)
文件大?。?/td> 939K
代理商： M38C59GFHP
Rev.2.00
Nov 23, 2005
page 34 of 75
REJ03B0098-0200
38C5 Group (One Time PROM version)
Timer Y mode register
(TYM: address 003816)
Real time port 1 control bit (P50)
0 : Real time port function invalid
1 : Real time port functin valid
b7
b0
Timer Y control register
(TYCON: address 003916)
Timer Y write control bit
0 : Write data to both timer latch and timer
1 : Write data to timer latch only
b7
b0
φ SOURCE:represents the supply source of internal clock φ.
XIN input: in the middle- or high-speed mode,
Internal on-chip oscillator divided by 4 in the on-chip
oscillator mode, and
Sub clock in the low-speed mode.
Not used (returns “0” when read)
Timer Y frequency division selection bits
b3 b2
0 0 : 1/16
φSOURCE
0 1 : 1/1
φSOURCE
1 0 : 1/2
φSOURCE
1 1 : 1/256
φSOURCE
Timer Y count source selection bit
0 : Frequency divider output
1 : f(XCIN)
Timer Y count stop bit
0 : Count operation
1 : Count stop
CNTR1 active edge switch bit
0 : Count at rising edge in event counter mode
Measure falling period in period measurement mode
Falling edge active for CNTR1 interrupt
1 : Count at falling edge in event counter mode
Measure rising period in period measurement mode
Rising edge active for CNTR1 interrupt
Timer Y operating mode bits
b5 b4
0 0 : Timer mode
0 1 : Period measurement mode
1 0 : Event counter mode
1 1 : Pulse width HL continuous measurement mode
P51 data for real time port
P50 data for real time port
Real time port 2 control bit (P51)
0 : Real time port function invalid
1 : Real time port functin valid
s Notes on Timer Y
q CNTR1 Interrupt Active Edge Selection
CNTR1 interrupt active edge depends on the CNTR1 active edge
switch bit. However, in pulse width HL continuously measurement
mode, CNTR1 interrupt request is generated at both rising and falling
edges of CNTR1 pin input signal regardless of the setting of CNTR1
active edge switch bit.
q Timer Y Read/Write Control
When reading from/writing to timer Y, read from/write to both the
high-order and low-order bytes of timer Y. When the value is read,
read the high-order bytes first and the low-order bytes next. When
the value is written, write the low-order bytes first and the high-
order bytes next.
Write to or read from the timer X register by the 16-bit unit. If read-
ing from the timer Y register during write operation or writing to it
during read operation is performed, normal operation will not be
performed.
Which write control can be selected by the timer Y write control bit
(b0) of the timer Y control register (address 003916), writing data to
both the latch and the timer at the same time or writing data only to
the latch. When writing a value to the timer Y address to write to the
latch only, the value is set into the reload latch and the timer is
updated at the next underflow. After reset release, when writing a
value to the timer Y address, the value is set into the timer and the
timer latch at the same time, because they are set to write at the
same time.
When writing to the latch only, if the write timing to the high-order
reload latch and the underflow timing are almost the same, the value
is set into the timer and the timer latch at the same time. In this
time, counting is stopped during writing to the high-order reload
latch.
Do not switch the timer count source during timer count operation.
Stop the timer count before switching it.
Fig. 29 Structure of Timer X related registers
q Real Time Port Control
When the real time port function is valid, data for the real time port is
output from ports P50 and P51 each time the timer Y underflows.
(However, if the real time port control bit is changed from “0” to “1”
after the data for real time port is set, data is output independent of
the timer Y operation.) When the data for the real time port is changed
while the real time port function is valid, the changed data is output at
the next underflow of timer Y. Before using this function, set the cor-
responding port direction registers to output mode.
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