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參數(shù)資料
| 型號： | M38B79MFH-A157FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 40/109頁 |
| 文件大小： | 1559K |
| 代理商： | M38B79MFH-A157FP |
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38B7 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
40
Fig. 40 Structure of serial I/O2 related register
b7
b7
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: (OE) U (PE) U (FE)=0
1: (OE) U (PE) U (FE)=1
Not used (returns
“
1
”
when read)
Serial I/O2 status register
(SIO2STS : address 001E
16
)
Serial I/O2 control register
(SIO2CON : address 001D
16
)
b0
b0
b7
UART control register
(UARTCON : address 0038
16
)
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P6
/T
D P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open-drain output (in output mode)
BRG clock switch bit
0: X
IN
or X
CIN
(depends on internal system clock)
1: X
CIN
Serial I/O2 clock I/O pin selection bit
0: S
CLK21
(P6
7
/S
CLK22
pin is used as I/O port or S
RDY2
output pin.)
1: S
CLK22
(P6
6
/S
CLK21
pin is used as I/O port.)
Not used (return
“
1
”
when read)
b0
BRG count source selection bit (CSS)
0: f(X
IN
) or f(X
CIN
)/2 or f(X
CIN
)
1: f(X
IN
)/4 or f(X
CIN
)/8 or f(X
CIN
)/4
Serial I/O2 synchronous clock selection bit (SCS)
0: BRG/ 4
(when clock synchronous serial I/O is selected)
BRG/16 (UART is selected)
1: External clock input
(when clock synchronous serial I/O is selected)
External clock input/16 (UART is selected)
S
output enable bit (SRDY)
0: P6
7
pin operates as ordinary I/O pin
1: P6
7
pin operates as S
RDY2
output pin
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O2 mode selection bit (SIOM)
0: Asynchronous serial I/O (UART)
1: Clock synchronous serial I/O
Serial I/O2 enable bit (SIOE)
0: Serial I/O2 disabled
(pins P6
to P6
operate as ordinary I/O pins)
1: Serial I/O2 enabled
(pins P6
4
to P6
7
operate as serial I/O pins)
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