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| 型號： | M38B57M6-126FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SENSOR HALL EFFECT DIFF SPEED |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 19/69頁 |
| 文件大?。?/td> | 1011K |
| 代理商： | M38B57M6-126FP |
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MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
19
PRELIMINARY
Notice: This s not a final specification.
Some parametric imits are subject to change.
Timers
8-Bit Timer
The 38B5 group has six built-in timers : Timer 1, Timer 2, Timer 3,
Timer 4, Timer 5, and Timer 6.
Each timer has the 8-bit timer latch. All timers are down-counters.
When the timer reaches “00
16
,” an underflow occurs with the next
count pulse. Then the contents of the timer latch is reloaded into the
timer and the timer continues down-counting. When a timer
underflows, the interrupt request bit corresponding to that timer is
set to “1.”
The count can be stopped by setting the stop bit of each timer to “1.”
The internal system clock can be set to either the high-speed mode
or low-speed mode with the CPU mode register. At the same time,
timer internal count source is switched to either f(X
IN
) or f(X
CIN
).
G
Timer 1, Timer 2
The count sources of timer 1 and timer 2 can be selected by setting
the timer 12 mode register. A rectangular waveform of timer 1
underflow signal divided by 2 is output from the P4
5
/T
1OUT
pin. The
waveform polarity changes each time timer 1 overflows. The active
edge of the external clock CNTR
0
can be switched with the bit 6 of
the interrupt edge selection register.
At reset or when executing the STP instruction, all bits of the timer 12
mode register are cleared to “0,” timer 1 is set to “FF
16
,” and timer 2
is set to “01
16
.”
G
Timer 3, Timer 4
The count sources of timer 3 and timer 4 can be selected by setting
the timer 34 mode register. A rectangular waveform of timer 3
underflow signal divided by 2 is output from the P4
6
/T
3OUT
pin. The
waveform polarity changes each time timer 3 overflows. The active
edge of the external clock CNTR
1
can be switched with the bit 7 of
the interrupt edge selection register.
G
Timer 5, Timer 6
The count sources of timer 5 and timer 6 can be selected by setting
the timer 56 mode register. A rectangular waveform of timer 6
underflow signal divided by 2 is output from the P4
4
/PWM
1
pin. The
waveform polarity changes each time timer 6 overflows.
G
Timer 6 PWM
1
Mode
Timer 6 can output a rectangular waveform with “H” duty cycle n/
(n+m) from the P4
4
/PWM
1
pin by setting the timer 56 mode register
(refer to Figure 16). The n is the value set in timer 6 latch (address
0025
16
) and m is the value in the timer 6 PWM register (address
0027
16
). If n is “0,” the PWM output is “L,” if m is “0,” the PWM output
is “H” (n = 0 is prior than m = 0). In the PWM mode, interrupts occur
at the rising edge of the PWM output.
Fig. 14 Structure of Timer Related Register
Timer 12 mode register
(T12M: address 0028
16
)
Timer 1 count stop bit
0 : Count operation
1 : Count stop
Timer 2 count stop bit
0 : Count operation
1 : Count stop
Timer 1 count source selection bits
00 : f(X
IN
)/8 or f(X
CIN
)/16
01 : f(X
CIN
)
10 : f(X
IN
)/16 or f(X
CIN
)/32
11 : f(X
IN
)/64 or f(X
CIN
)/128
Timer 2 count source selection bits
00 : Underflow of Timer 1
01 : f(X
)
10 : External count input CNTR
0
11 : Not available
Timer 1 output selection bit (P4
5
)
0 : I/O port
1 : Timer 1 output
Not used (returns “0” when read)
(Do not write “1” to this bit.)
Timer 34 mode register
(T34M: address 0029
16
)
Timer 3 count stop bit
0 : Count operation
1 : Count stop
Timer 4 count stop bit
0 : Count operation
1 : Count stop
Timer 3 count source selection bits
00 : f(X
)/8 or f(X
)/16
01 : Underflow of Timer 2
10 : f(X
IN
)/16 or f(X
CIN
)/32
11 : f(X
IN
)/64 or f(X
CIN
)/128
Timer 4 count source selection bits
00 : f(X
IN
)/8 or f(X
CIN
)/16
01 : Underflow of Timer 3
10 : External count input CNTR
1
11 : Not available
Timer 3 output selection bit (P4
6
)
0 : I/O port
1 : Timer 3 output
Not used (returns “0” when read)
(Do not write “1” to this bit.)
Timer 56 mode register
(T56M: address 002A
16
)
Timer 5 count stop bit
0 : Count operation
1 : Count stop
Timer 6 count stop bit
0 : Count operation
1 : Count stop
Timer 5 count source selection bit
0 : f(X
IN
)/8 or f(X
CIN
)/16
1 : Underflow of Timer 4
Timer 6 operation mode selection bit
0 : Timer mode
1 : PWM mode
Timer 6 count source selection bits
00 : f(X
IN
)/8 or f(X
CIN
)/16
01 : Underflow of Timer 5
10 : Underflow of Timer 4
11 : Not available
Timer 6 (PWM) output selection bit (P4
4
)
0 : I/O port
1 : Timer 6 output
Not used (returns “0” when read)
(Do not write “1” to this bit.)
b7
b0
b7
b0
b7
b0
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