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參數(shù)資料
| 型號： | M37702M2A |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機) |
| 中文描述： | 單片微機16位的CMOS（16位單片機） |
| 文件頁數(shù)： | 32/59頁 |
| 文件大小： | 811K |
| 代理商： | M37702M2A |
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32
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Bit 6 is the parity bit selection bit which indicates whether to add
parity bit or not.
Bits 4 to 6 should be set or reset according to the data format of
the communicating devices.
Bit 7 is the sleep selection bit. The sleep mode is described later.
The UART
i
transmit/receive control register 0 bit 2 is used to de-
i
input or RTS
i
output.
CTS
i
input is used if bit 2 is “0” and RTS
i
output is used if bit 2 is
“1”.
If CTS
i
input is selected, the user can control whether to stop or
start transmission by external CTS
i
input. RTS
i
will be described
later.
Transmission
Transmission is started when the bit 0 (TE
i
flag) of UART
i
transmit/
receive control register 1 is “1”, the bit 1 (TI
i
flag) is “0”, and CTS
i
input is “L” if CTS
i
input is selected. As shown in Figure 40 and 41,
data is output from the TxD
i
pin with the stop bit and parity bit
specified by the bits 4 to 6 of UART
i
transmit/receive mode regis-
ter. The data is output from the least significant bit.
The TIi flag indicates whether the transmission buffer is empty or
not. It is cleared to “0” when data is written in the transmission
buffer and set to “1” when the contents of the transmission buffer
register is transferred to the transmission register.
When the transmission register becomes empty after the contents
has been transmitted, data is transferred automatically form the
transmission buffer register to the transmission register if the next
transmission start condition is satisfied.
Once transmission has started, the TE
i
flag, TI
i
flag, and CTS
i
sig-
nal (if CTS
i
input is selected) are ignored until data transmission is
completed.
Therefore, transmission does not stop until it completes even if the
TE
i
flag is cleared during transmission.
i
flag, TI
i
flag, and
CTS
i
is checked while the T
ENDi
signal shown in Figure 40 is “H”.
Therefore, data can be transmitted continuously if the next trans-
mission data is written in the transmission buffer register and TI
i
flag is cleared to 0 before the T
ENDi
signal goes “H”.
The bit 3 (TxEPTY
i
flag) of UART
i
transmit/receive control register
0 changes to “1” at the next cycle after the T
ENDi
signal goes “H”
and changes to “0” when transmission starts. Therefore, this flag
can be used to determine whether data transmission is completed.
When the TI
i
flag changes from “0” to “1”, the interrupt request bit
in the UART
i
transmission interrupt control register is set to “1”.
Receive
Receive is enabled when the bit 2 (RE
i
flag) of UART
i
transmit/re-
ceive control register 1 is set. As shown in Figure 42, the
frequency divider circuit at the receiving end begin to work when a
start bit is arrived and the data is received.
Fig. 42 Receive timing example when 8-bit asynchronous communication with no parity and 1 stop bit is selected.
f
i
or f
EXT
D
0
RE
i
R
x
D
i
Receive
Clock
RI
i
RTS
i
Start bit
D
1
Stop bit
D
7
Start bit
Starting at the falling
edge of start bit
Check to be “L” level
Get data
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37702M2A-278FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2AXXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2A-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2BXXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37702M2B-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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