參數(shù)資料
型號: M37702M2A
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 16 Bits CMOS Microcomputer(16位單片機)
中文描述: 單片微機16位的CMOS(16位單片機)
文件頁數(shù): 24/59頁
文件大?。?/td> 811K
代理商: M37702M2A
24
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
TIMER B
Figure 27 shows a block diagram of timer B.
Timer B has three modes; timer mode, event counter mode, and
pulse period measurement/pulse width measurement mode. The
mode is selected with bits 0 and 1 of the timer Bi mode register
(i = 0 to 2). Each of these modes is described below.
(1) Timer mode [00]
Figure 28 shows the bit configuration of the timer Bi mode register
during timer mode. Bits 0, and 1 of the timer Bi mode register must
always be “0” in timer mode.
Bits 6 and 7 are used to select the clock source. The counting of
the selected clock starts when the count start flag is “1” and stops
when “0”.
As shown in Figure 13, the timer Bi count start flag is at the same
address as the timer Ai count start flag. The count is decremented,
an interrupt occurs, and the interrupt request bit in the timer Bi in-
terrupt control register is set when the contents becomes 0000
16
.
At the same time, the contents of the reload register is stored in
the counter and count is continued.
Timer Bi does not have a pulse output function or a gate function
like timer A.
When data is written to timer Bi halted, it is written to the reload
register and the counter. When data is written to timer Bi which is
busy, the data is written to the reload register, but not to the
counter. The counter is reloaded with new data from the reload
register at the next reload time. The contents of the counter can
be read at any time.
Fig. 27 Timer B block diagram
f
2
f
16
f
64
f
512
Timer
Pulse period measurement/pulse
width measurement
Polarity selection
and edge pulse
generator
Event counter
Count start flag
Addresses
Timer B0 51
16
50
16
Timer B1 53
16
52
16
Timer B2 55
16
54
16
TBi
IN
(i = 0 – 2)
(40
16
)
Counter reset
circuit
Clock source selection
Data bus (odd)
(Lower 8 bits)
Data bus (even)
(Higher 8 bits)
Counter (16)
Reload register (16)
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