18
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(2) Event counter mode [01]
Figure 15 shows the bit configuration of the timer Ai mode register
during event counter mode. In event counter mode, the bit 0 of the
timer Ai mode register must be “1” and bit 1 and 5 must be “0”.
The input signal from the TAi
IN
pin is counted when the count start
flag shown in Figure 13 is “1“ and counting is stopped when it
is “0”.
Count is performed at the fall of the input signal when bit 3 is “0”
and at the rise of the signal when it is “1”.
In event counter mode, whether to increment or decrement the
count can be selected with the up-down flag or the input signal
from the TAi
OUT
pin.
When bit 4 of the timer Ai mode register is “0”, the up-down flag is
used to determine whether to increment or decrement the count
(decrement when the flag is “0” and increment when it is “1”). Fig-
ure 16 shows the bit configuration of the up-down flag.
When bit 4 of the timer Ai mode register is “1”, the input signal
from the TAi
OUT
pin is used to determine whether to increment or
decrement the count. However, note that bit 2 must be “0” if bit 4
is “1” because if bit 2 is “1”, TAi
OUT
pin becomes an output pin with
pulse output.
The count is decremented when the input signal from the TAi
OUT
pin is “L” and incremented when it is “H”. Determine the level of
the input signal from the TAi
OUT
pin before valid edge is input to
the TAi
IN
pin.
An interrupt request signal is generated and the interrupt request
bit in the timer Ai interrupt control register is set when the counter
reaches 0000
16
(decrement count) or FFFF
16
(increment count).
At the same time, the contents of the reload register is transferred
to the counter and the count is continued.
When bit 2 is “1” and the counter reaches 0000
16
(decrement
count) or FFFF
16
(increment count), the waveform reversing polar-
ity is output from TAi
OUT
pin.
If bit 2 is “0”, TAi
OUT
pin can be used as a normal port pin. How-
ever, if bit 4 is “1“ and the TAi
OUT
pin is used as an output pin, the
output from the pin changes the count direction. Therefore, bit 4
should be “0” unless the output from the TAi
OUT
pin is to be used
to select the count direction.
Fig. 15 Timer Ai mode register bit configuration during event
counter mode
Fig. 16 Up-down flag bit configuration
0 1 : Always “01” in event counter
mode
0 : No pulse output
1 : Pulse output
7 6 5 4 3 2 1 0
0
0 1
0 : Count at the falling edge of input
signal
1 : Count at the rising edge of input
signal
0 : Increment or decrement according
to up-down flag
1 : Increment or decrement according
to TAi
OUT
pin input signal level
0 : Always “0” in event counter mode
: Not used in event counter mode
Timer A0 mode register 56
16
Timer A1 mode register 57
16
Timer A2 mode register 58
16
Timer A3 mode register 59
16
Timer A4 mode register 5A
16
Addresses
Timer A0 up-down flag
Timer A1 up-down flag
Timer A2 up-down flag
Timer A3 up-down flag
7 6 5 4 3 2 1 0
44
16
Address
Up-down flag
Timer A4 up-down flag
Timer A2 two-phase pulse signal processing
selection bit
0 : Two-phase pulse signal processing disabled
1 : Two-phase pulse signal processing mode
Timer A3 two-phase pulse signal processing
selection bit
0 : Two-phase pulse signal processing disabled
1 : Two-phase pulse signal processing mode
Timer A4 two-phase pulse signal processing
selection bit
0 : Two-phase pulse signal processing disabled
1 : Two-phase pulse signal processing mode