參數(shù)資料
型號(hào): M37641M8-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 130/136頁
文件大?。?/td> 1672K
代理商: M37641M8-XXXFP
93
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7641 Group
S0, S1 setup time for read
S0, S1 setup time for write
S0, S1 hold time for read
S0, S1 hold time for write
A0 setup time for read
A0 setup time for write
A0 hold time for read
A0 hold time for write
Read pulse width
Write pulse width
Data input setup time before write
Data input hold time after write
Data output enable time after read
Data output disable time after read
OBF output transmission time after read
IBF output transmission time after write
tsu(S-R)
tsu(S-W)
th(R-S)
th(W-S)
tsu(A-R)
tsu(A-W)
th(R-A)
th(W-A)
tw(R)
tw(W)
tsu(D-W)
th(W-D)
ta
(R-D)
tv
(R-D)
tv
(R-OBF)
td
(W-IBF)
Limits
ns
Parameter
Min.
0
10
0
80
35
0
10
Typ.
Max.
Symbol
Unit
Table 22 Master CPU bus interface (MBI; RD, WR separate type) (Vcc = 3.0 to 3.6 V, Vss = 0 V, Ta = –20 to 70°C, unless otherwise noted)
In Vcc = 3 V
65
50
S0, S1 setup time
S0, S1 hold time
A0 setup time
A0 hold time
R/W setup time
R/W hold time
Enable pulse width
Enable pulse interval
Data input setup time before write
Data input hold time after write
Data output enable time after read
Data output disable time after read
OBF output transmission time after E inactive
IBF output transmission time after E inactive
tsu(S-E)
th(E-S)
tsu(A-E)
th(E-A)
tsu(RW-E)
th(E-RW)
tw(E)
tw(E-E)
tsu(D-E)
th(E-D)
ta(E-D)
tv(E-D)
tv(E-OBF)
td(E-IBF)
Limits
ns
Parameter
Min.
0
10
0
10
80
35
0
10
Typ.
Max.
Symbol
Unit
Table 23 Master CPU bus interface (MBI; R/W type) (Vcc = 3.0 to 3.6 V, Vss = 0 V, Ta = –20 to 70°C, unless otherwise noted)
65
50
In Vcc = 3 V
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