69
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
X : Not fixed
Notes 1: When using the endpoint 1, this contents are “0116”.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(45)
(46)
(47)
(48)
(49)
(50)
(51)
(52)
(53)
(54)
(55)
(56)
(57)
(58)
(59)
(60)
(61)
(62)
(63)
(64)
(65)
(66)
(67)
(68)
(69)
(70)
(71)
(72)
(73)
(74)
(75)
(76)
(77)
(78)
(79)
(80)
(81)
(82)
(83)
(84)
(85)
(86)
(87)
(88)
(89)
(90)
(91)
(92)
(93)
Register contents
003216
003316
003616
003816
003A16
003B16
003E16
003F16
004016
004116
004216
004316
004416
004516
004616
004716
004816
004916
004A16
004C16
004D16
004E16
005016
005116
005216
005316
005416
005516
005616
005716
005816
005916
005A16
005B16
005C16
005D16
005E16
005F16
006A16
006C16
006D16
006E16
006F16
FFC916
(PS)
(PCH)
(PCL)
Address
0016
FF16
0016
FF16
Address Register contents
0016
FF16
0016
FF16
0016
FFFB16 contents
FFFA16 contents
CPU mode register A (CPUA)
CPU mode register B (CPUB)
Interrupt request register A (IREQA)
Interrupt request register B (IREQB)
Interrupt request register C (IREQC)
Interrupt control register A (ICONA)
Interrupt control register B (ICONB)
Interrupt control register C (ICONC)
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P3 direction register (P3D)
Port control register (PTC)
Interrupt polarity select register (IPOL)
Port P2 pull-up control register (PUP2)
USB control register (USBC)
Port P6 (P6)
Port P6 direction register (P6D)
Port P5 (P5)
Port P5 direction register (P5D)
Port P4 (P4)
Port P4 direction register (P4D)
Port P7 (P7)
Port P7 direction register (P7D)
Port P8 (P8)
Port P8 direction register (P8D)
Clock control register (CCR)
Timer XL (TXL)
Timer XH (TXH)
Timer YL (TYL)
Timer YH (TYH)
Timer 1 (T1)
Timer 2 (T2)
Timer 3 (T3)
Timer X mode register (TXM)
Timer Y mode register (TYM)
Timer 123 mode register (T123M)
Serial I/O control register 1 (SIOCON1)
Serial I/O control register 2 (SIOCON2)
Special count source generator 1 (SCSG1)
Special count source generator 2 (SCSG2)
Special count source mode register (SCSGM)
UART1 mode register (U1MOD)
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001F16
002016
002116
002216
002316
002416
002516
002616
002716
002816
002916
002B16
002C16
002D16
002E16
002F16
003016
1
0 00 0 0
0
UART1 status register (U1STS)
UART1 control register (U1CON)
UART1 RTS control register (U1RTSC)
UART2 mode register (U2MOD)
UART2 status register (U2STS)
UART2 control register (U2CON)
UART2 RTS control register (U2RTSC)
DMAC index and status register (DMAIS)
DMAC channel x mode register 1 (DMAx1)
DMAC channel x mode register 2 (DMAx2)
DMAC channel x source register Low (DMAxSL)
DMAC channel x source register High (DMAxSH)
DMAC channel x destination register Low (DMAxDL)
DMAC channel x destination register
High (DMAxDH)
DMAC channel x transfer count register Low (DMAxCL)
DMAC channel x transfer count register High (DMAxCH)
Data bus buffer register 0 (DBB0)
Data bus buffer status register 0 (DBBS0)
Data bus buffer control register 0 (DBBC0)
Data bus buffer register 1 (DBB1)
Data bus buffer status register 1 (DBBS1)
Data bus buffer control register 1 (DBBC1)
USB address register (USBA)
USB power management register (USBPM)
USB interrupt status register 1 (USBIS1)
USB interrupt status register 2 (USBIS2)
USB interrupt enable register 1 (USBIE1)
USB interrupt enable register 2 (USBIE2)
USB frame number register Low (USBSOFL)
USB frame number register High (USBSOFH)
USB endpoint index register (USBINDEX)
USB endpoint x IN control register (IN_CSR)
USB endpoint x OUT control register (OUT_CSR)
USB endpoint x IN max. packet size register (IN_MAXP)
USB endpoint x OUT max. packet size register (OUT_MAXP)
USB endpoint x OUT write count register Low (WRT_CNTL)
USB endpoint x OUT write count register High (WRT_CNTH)
USB endpoint FIFO mode register (USBFIFOMR)
Flash memory control register (FMCR)
Frequency synthesizer control register (FSC)
Frequency synthesizer multiply register 1 (FSM1)
Frequency synthesizer multiply register 2 (FSM2)
Frequency synthesizer divide register (FSM2)
ROM code protect control register (ROMCP)
Processor status register
Program counter
0 0
1 1
00
0
1 1
0 0
1
0 0
00
0
0 0
1
10 00 0 0 00
1
0 00 0 0
0
1
10 00 0 0 00
1
0 11 0 0
0
1
0
1 0
0
00
0
1 0
0
00
0
0 00 0 0
0
1
0
0 0 0
0
1
0
1
0
1
0 0
00
0
1
0 0
00
0
0 1
01
(Note 1)
(Note 3)
3: The flash memory control register and the ROM code protect control register exists in the flash memory version only.
2: Since the initial values for other than above mentioned registers and RAM contents are indefinite at reset, they must be set.
Fig. 63 Internal status at reset