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參數(shù)資料
| 型號： | M37640M8-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 38/96頁 |
| 文件大?。?/td> | 1477K |
| 代理商： | M37640M8-XXXFP |
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43
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1.19.3 UART Status Register (UxSTS)
The UART Status Register (UxSTS) reflects both the
transmit and receive status (see Figure 1.44). The sta-
tus register is read only. The MSB is always “0” during
a read operation. Writing to this register has no effect.
Status flags are set and reset under the conditions in-
dicated below. The setting and resetting of the
transmit and receive status are not affected by trans-
mit and receive enable flags. The setting and resetting
of the receive error flags and receive buffer full flag dif-
fers when UART address mode is enabled. These
differences are described in section “1.19.7 UART Ad-
dress Mode”.
1.19.3.1 Receive Error Sum Flag
The Receive Error Sum Flag (SER) is set when an
overrun, framing, or parity error occurs after comple-
tion of a receive operation.
It is reset when the status register is read, the hard-
ware reset is asserted, or the receiver is initialized by
setting the Receive Initialization Bit (RIN). If the receive
operation completes while the status register is being
read, the status information is updated upon comple-
tion of the status register read.
1.19.3.2 Receive Overrun Flag
The Receive Overrun Flag (OER) is set if the previous
data in the low-order byte of the receive buffer
(UxTRB1) is not read before the current receive opera-
tion is completed. It is also set if a receive error
occurred for the previous data and the status register
is not read before the current receive operation is com-
pleted. This flag is reset when the status register is
read. This flag is also reset when the hardware reset is
asserted or the receiver is initialized by RIN. If the re-
ceive operation completes while the status register is
being read, the status information is updated upon
completion of the status register read.
1.19.3.3 Receive Framing Error Flag
The Receive Framing Error Flag (FER) is set when the
stop bit of the received data is “0”. If the Stop Bit Se-
lection Bit (STB, bit 3 of UxMOD) is set, the flag is set
if either of the two stop bits is a “0”. This flag is reset
when the status register is read, the hardware reset is
asserted, or the receiver is initialized by RIN. If the re-
ceive operation completes while the status register is
being read, the status information is updated upon
completion of the status register read.
1.19.3.4 Receive Parity Error Flag
The Receive Parity Error Flag (PER) is set when the
parity of received data and the Parity Selection Bit
(PMD, bit 4 of UxMOD) are different. It is enabled only
if the Parity Enable Bit (PEN, bit 5 of UxMOD) is set.
This flag is reset when the status register is read, the
hardware reset is asserted, or the receiver is initialized
by RIN. If the receive operation completes while the
status register is being read, the status information is
updated upon completion of the status register read.
1.19.3.5 Receive Buffer Full Flag
The Receive Buffer Full Flag (RBF) is set when the
last stop bit of the data is received. It is not set when
a receive error occurs. This flag is reset when the low-
order byte of the receive buffer (UxTRB1) is read, the
hardware reset is asserted, or the receive process is
initialized by RIN. If the receive operation completes
while the status register is being read, the status infor-
mation is updated upon completion of the status
register read.
1.19.3.6 Transmission Complete Flag
In the case where no data is contained in the transmit
buffer, the Transmission Complete Flag (TCM) is set
when the last bit in the transmit shift register is trans-
mitted. In the case where the transmit buffer does
contain data, the TCM flag is set when the last bit in
the transmit shift register is transmitted if TBE is a “0”
or CTS handshaking is enabled and CTSx is “1”. The
TCM flag is also set when the hardware reset is as-
serted or when the transmitter is initialized by setting
the Transmit Initialization Bit (TIN, bit 2 of UxCON). It
is reset when a transmission operation begins.
1.19.3.7 Transmission Buffer Empty Flag
The Transmission Buffer Empty Flag (TBE) is set
when the contents of the transmit buffer are loaded
into the transmit shift register. The TBE flag is also
set when the hardware reset is asserted or when the
transmitter is initialized by TIN. It is reset when a write
operation is performed to the low-order byte of the
transmit buffer (UxTRB1).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37641F8E8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8FP#U0 | 功能描述:IC 740 MCU FLASH 32K 80QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/7600 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| M37641F8HP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37641F8HP#U0 | 功能描述:IC 740 MCU FLASH 32K 80LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/7600 產(chǎn)品培訓(xùn)模塊:Graphics LCD System and PIC24 Interface Asynchronous Stimulus 標(biāo)準(zhǔn)包裝:27 系列:PIC® 24H 核心處理器:PIC 芯體尺寸:16-位 速度:40 MIP 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):21 程序存儲器容量:12KB（4K x 24） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x10b/12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 包裝:管件 產(chǎn)品目錄頁面:648 (CN2011-ZH PDF) 配用:AC164339-ND - MODULE SKT FOR PM3 28SOICDV164033-ND - KIT START EXPLORER 16 MPLAB ICD2 |
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