參數(shù)資料
型號(hào): M37560ME-XXXFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 24/65頁(yè)
文件大?。?/td> 955K
代理商: M37560ME-XXXFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
24
TIMERS
The 7560 group has five timers: timer X, timer Y, timer 1, timer 2,
and timer 3. Timer X and timer Y are 16-bit timers, and timer 1,
timer 2, and timer 3 are 8-bit timers.
All timers are down count timers. When the timer reaches
00
16
,
an underflow occurs at the next count pulse and the correspond-
ing timer latch is reloaded into the timer and the count is contin-
ued. When a timer underflows, the interrupt request bit corre-
sponding to that timer is set to
1
.
Read and write operation on 16-bit timer must be performed for
both high- and low-order bytes. When reading a 16-bit timer, read
the high-order byte first. When writing to a 16-bit timer, write the
low-order byte first. The 16-bit timer cannot perform the correct
operation when reading during the write operation, or when writing
during the read operation.
Fig. 19 Timer block diagram
1
P
5
5
/
C
N
T
R
1
0
"10"
"
0
0
"
,
"
0
1
"
,
"
1
1
"
P5
4
/CNTR
0
Q
Q
T
S
0
1
0
Q
D
0
Q
D
1
0
1
"10"
Q
Q
/
1
I
N
)
n
φ
T
S
0
1
0
1
1
P
4
3
/
φ
/
T
O
U
T
X
CIN
0
1
r
3
c
e
C
e
N
d
T
e
R
0
s
a
i
c
t
c
t
i
v
e
b
g
w
h
i
t
T
s
i
m
e
l
e
c
r
t
i
1
o
n
c
o
b
u
i
t
n
t
s
o
u
r
c
e
e
Real time port
control bit
0
f(
w
(
I
f
(
h
N
)
6
/
=
X
C
e
1
6
X
C
I
N
/
2
)
C
e
N
d
T
e
R
1
s
a
i
c
t
c
t
i
v
e
b
g
w
h
i
t
Timer Y stop
control bit
Falling edge detection
Period
measurement mode
T
i
n
r
e
i
m
t
e
q
e
r
u
r
u
e
Y
p
s
r
t
t
Pulse width HL continuously
measurement mode
Rising edge detection
Timer Y
operating
mode bits
T
i
n
r
e
i
m
t
e
q
e
r
u
r
u
e
X
p
s
r
t
t
Timer X mode register
write signal
P
4
3
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
u
l
s
e
o
u
t
p
u
t
m
o
d
e
P5
4
latch
T
c
i
m
o
n
e
t
r
r
o
X
l
s
i
i
t
o
p
b
t
Timer X write
control bit
L
a
t
c
h
T
i
n
0
i
m
g
0
e
m
,
r
o
0
X
d
1
e
o
p
b
,
e
i
t
1
r
s
a
t
-
1
Pulse width
measurement
mode
CNTR
0
active
edge switch bit
P
u
l
s
e
o
u
t
p
u
t
m
o
d
e
P
5
4
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
T
O
a
c
s
w
U
t
i
i
t
T
v
e
c
o
e
h
u
d
b
t
p
g
t
u
e
t
0
i
T
c
i
m
o
n
e
t
r
r
o
2
l
b
w
i
r
i
t
e
t
T
OUT
output
control bit
T
s
i
m
o
u
e
r
s
c
e
o
l
u
e
n
c
t
i
t
o
n
b
i
t
Timer 2
interrupt
request
T
i
n
r
e
i
m
t
e
q
e
r
u
r
u
e
3
p
s
t
r
t
T
s
i
m
e
l
e
c
r
t
i
2
o
n
c
o
b
u
i
t
n
t
s
o
u
r
c
e
i
e
T
i
n
r
e
i
m
t
e
q
e
r
u
r
u
e
1
p
s
r
t
t
Data bus
R
c
e
o
a
n
l
r
t
o
i
m
l
e
i
p
o
1
r
t
t
b
t
R
c
e
o
a
n
l
r
t
o
i
m
l
e
i
p
o
1
r
t
t
b
t
Timer Y (low) (8)
Timer Y (high) (8)
Timer 3 latch (8)
Timer 3 (8)
T
i
m
e
r
1
l
a
t
c
h
(
8
)
Timer 1 (8)
T
m
e
r
2
l
a
t
c
h
(
8
)
Timer 2 (8)
Timer X (low) (8)
Timer X (high) (8)
T
m
e
r
X
(
l
o
w
)
l
a
t
c
h
(
8
)
Timer X (high) latch (8)
Timer Y (low) latch (8)
T
i
m
e
r
Y
(
h
i
g
h
)
l
a
t
c
h
(
8
)
L
a
t
c
h
T
output
control bit
P
4
3
l
a
t
c
h
f(
(
X
I
f
(
N
)
/
N
)
1
6
/
X
C
I
1
6
w
h
e
n
φ
=
X
C
I
N
/
2
)
f(X
IN
)/16
(f(X
CIN
)/16 when
φ
= X
CIN
/2)
f(
(
X
I
f
(
N
)
/
N
)
1
6
/
X
C
I
1
6
w
h
e
n
φ
=
X
C
I
N
/
2
)
f(X
IN
)/16
(f(X
CIN
)/16 when
φ
= X
CIN
/2)
P
5
2
/
R
T
P
0
P
5
3
/
R
T
P
1
P
r
e
5
2
a
d
t
a
m
t
a
e
f
p
o
o
r
r
l
i
t
P5
data for
real time port
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