參數(shù)資料
型號： M37560ME-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 13/65頁
文件大小： 955K
代理商： M37560ME-XXXFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
13
Fig. 10 Memory map of special function register (SFR)
0021
16
0022
16
2
2
2
2
2
2
2
002A
16
002B
16
2
2
002E
16
002F
16
0030
16
3
3
3
0034
16
0035
16
0036
16
0037
16
3
3
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
0
2
0
1
6
0
0
0
0
0
0
0
3
1
4
1
5
1
6
1
7
1
8
1
9
1
6
6
6
6
6
6
6
0
0
C
1
D
1
6
6
0
0
0
1
1
2
1
3
1
6
6
6
0
0
8
1
9
1
6
6
0001
16
0002
16
0
0
0
0
0
0
0
000A
16
000B
16
0
0
0
000F
16
0010
16
1
1
1
0014
16
0015
16
0016
16
0017
16
1
1
001A
16
001B
16
001C
16
001D
16
001E
16
1
0
0
0
1
6
0
0
0
0
0
0
0
3
1
4
1
5
1
6
1
7
1
8
1
9
1
6
6
6
6
6
6
6
0
0
0
C
1
D
1
E
1
6
6
6
0
0
0
1
1
2
1
3
1
6
6
6
0
0
8
1
9
1
6
6
0
F
1
6
P
P
o
o
r
r
t
t
P
P
0
0
(
d
P
i
0
r
e
)
c
Port P1 (P1)
P
r
t
P
P
r
t
P
P
r
t
P
P
r
t
P
P
r
t
P
o
o
o
o
o
1
2
2
3
3
d
(
d
(
o
i
r
e
2
r
e
3
u
t
c
)
c
)
p
t
i
o
n
r
e
g
i
s
t
e
r
(
P
1
D
)
P
i
P
t
i
o
n
r
e
g
i
s
t
e
r
(
P
2
D
)
P
P
Port P5 (P5)
Port P5 direction register (P5D)
P
r
t
P
6
(
P
6
)
P
r
t
P
6
d
i
r
e
c
t
i
o
n
P
r
t
P
7
(
P
7
)
P
r
t
P
7
d
i
r
e
c
t
i
o
n
o
o
r
r
t
t
P
P
4
4
(
d
P
i
4
r
e
)
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
4
D
)
o
o
o
o
r
e
g
i
s
t
e
r
(
P
6
D
)
r
e
g
i
s
t
e
r
(
P
7
D
)
Serial I/O1 status register (SIO1STS)
Serial I/O1 control register (SIO1CON)
UART control register (UARTCON)
B
u
d
r
a
t
e
g
e
n
e
r
a
t
o
Serial I/O2 control register (SIO2CON)
a
r
(
B
R
G
)
In
t
e
r
r
u
p
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
2
(
I
C
O
N
2
)
T
Timer X mode register (TXM)
Timer Y mode register (TYM)
Timer 123 mode register (T123M)
T
OUT
/
φ
output control register (CKOUT)
PWM control register (PWMCON)
P
M
p
r
e
s
c
a
l
e
r
(
P
R
P
M
r
e
g
i
s
t
e
r
(
P
W
M
R
s
e
r
v
e
d
a
r
e
a
R
s
e
r
v
e
d
a
r
e
a
R
s
e
r
v
e
d
a
r
e
a
Reserved area
D-A1 conversion register (DA1)
D-A2 conversion register (DA2)
i
m
e
r
3
(
T
3
)
In
t
e
r
r
u
p
t
e
d
g
e
s
e
l
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
I
N
T
E
D
G
E
)
CPU mode register (CPUM)
In
e
r
r
u
p
t
r
e
q
u
e
In
e
r
r
u
p
t
r
e
q
u
e
In
e
r
r
u
p
t
c
o
n
t
r
t
t
t
s
s
l
t
t
r
r
r
e
e
e
g
g
g
i
i
i
s
s
s
t
t
t
e
e
e
r
r
r
1
1
2
(
(
(
I
I
I
C
R
R
E
E
O
Q
Q
N
1
2
)
)
)
o
1
T
T
i
i
m
m
e
e
r
r
X
X
(
(
l
h
o
w
i
g
)
)
(
T
(
X
T
L
X
)
T
Timer Y (high) (TYH)
i
m
e
r
Y
(
l
o
w
)
(
T
Y
L
)
T
T
i
i
m
m
e
e
r
r
1
2
(
(
T
T
1
2
)
)
h
H
)
PULL register A (PULLA)
P
L
L
r
e
g
i
s
t
e
Transmit/Receive buffer register(TB/RB)
U
r
B
(
P
U
L
L
B
)
Segment output enable register (SEG)
L
D
m
o
d
e
r
e
g
i
s
t
e
r
C
(
L
M
)
A-D control register (ADCON)
A-D conversion register (AD)
D
A
c
o
n
t
r
o
l
r
e
g
a
t
c
h
d
o
g
t
i
m
e
r
c
R
Key input control register (KIC)
e
s
e
r
v
e
d
a
r
e
a
t
i
o
n
r
e
g
i
s
t
e
r
(
P
0
D
)
u
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
P
3
C
)
R
S
e
e
s
r
e
i
a
r
l
v
I
e
/
O
d
2
a
r
r
e
e
a
g
i
s
t
e
r
(
S
I
O
2
)
W
W
e
e
e
E
)
P
W
M
)
-
i
s
t
e
r
(
D
A
C
O
N
)
W
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
W
D
T
C
O
N
)
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