參數資料
型號: M37560ME-XXXFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數: 22/65頁
文件大?。?/td> 955K
代理商: M37560ME-XXXFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
22
Fig. 16 Interrupt control
Fig. 17 Structure of interrupt-related registers
I
Notes on interrupts
When setting the followings, the interrupt request bit may be set to
1
.
When setting external interrupt active edge
Related register: Interrupt edge selection register (address 3A
16
)
Timer X mode register (address 27
16
)
Timer Y mode register (address 28
16
)
When switching interrupt sources of an interrupt vector address
where two or more interrupt sources are allocated
Related register: Interrupt source selection bit of A-D control
regsiter (bit 6 of address 34
16
)
When not requiring for the interrupt occurrence synchronous with
these setting, take the following sequence.
Set the corresponding interrupt enable bit to
0
(disabled).
Set the interrupt edge select bit (polarity switch bit) or the inter-
rupt source select bit to
1
.
Set the corresponding interrupt request bit to
0
after 1 or more
instructions have been executed.
Set the corresponding interrupt enable bit to
1
(enabled).
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
In
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r
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q
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b7
b
0
In
(INTEDGE : address 003A
16
)
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IN
I
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I
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0
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1
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2
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In
(IREQ1 : address 003C
16
)
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I
I
X
Y
2
3
u
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In
(ICON1 : address 003E
16
)
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1
INT
0
interrupt enable bit
INT
1
interrupt enable bit
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
0 : No interrupt request issued
1 : Interrupt request issued
Interrupt request register 2
(I
E
Q
2
:
a
d
d
r
C
C
T
I
N
S
K
A
N
N
N
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R
0
R
1
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(
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)
R
e
s
s
0
0
3
D
1
6
)
In
(ICON2 : address 003F
16
)
t
e
r
r
u
p
t
c
o
n
t
r
o
l
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2
CNTR
0
interrupt enable bit
CNTR
1
interrupt enable bit
Timer 1 interrupt enable bit
INT
2
interrupt enable bit
Serial I/O2 interrupt enable bit
Key input interrupt enable bit
ADT/AD conversion interrupt enable bit
Not used (returns
0
when read)
(Do not write
1
to this bit)
0
1
:
I
I
n
n
t
t
e
e
r
r
r
r
u
u
p
p
t
t
s
s
d
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i
n
s
a
a
b
b
l
e
e
d
d
:
l
0 : Falling edge active
1 : Rising edge active
b
7
b
0
b
7
b
0
b
7
b
0
b7
b0
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