參數(shù)資料
型號(hào)： M37544
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 54/68頁(yè)
文件大?。?/td> 579K
代理商： M37544
7544 Group
Rev.1.04 2004.06.08 page 54 of 66
REJ03B0012-0104Z
A/D Converter Characteristics
Table 14 A/D Converter characteristics (V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Resolution
Absolute accuracy
(quantification error excluded)
Conversion time
Ladder resistor
Reference power source
input current
A/D port input current
Note:
As for AD translation accuracy, on the following operating conditions, accuracy may become low.
(1) Since the analog circuit inside a microcomputer becomes sensitive to noise when V
REF
voltage is set up lower than Vcc voltage,
accuracy may become low rather than the case where V
REF
voltage and Vcc voltage are set up to the same value..
(2) When V
REF
voltage is less than [ 3.0V ], the accuracy at the time of low temperature may become extremely low compared with
the time of room temperature. The use beyond V
REF
=3.0V is recommended in the system the use by the side of low temperature
is assumed to be.
Min.
Typ.
Max.
8
±3
Symbol
Parameter
Limits
Unit
Test conditions
Ta = –20 to 85 °C, Vcc = V
REF
V
REF
= 5.0 V
V
REF
= 3.0 V
Bits
LSB
tc(X
IN
)
k
μA
μA
109
200
120
5.0
—
ABS
t
CONV
R
LADDER
I
VREF
I
I(AD)
37
135
80
50
30
Timing Requirements
Table 15 Timing requirements (V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Min.
2
125
50
50
200
80
80
2000
800
800
800
370
370
220
100
Typ.
Max.
Symbol
______
t
W
(RESET)
t
C
(X
IN
)
t
WH
(X
IN
)
t
WL
(X
IN
)
t
C
(CNTR
0
)
t
WH
(CNTR
0
)
t
WL
(CNTR
0
)
t
C
(CNTR
1
)
t
WH
(CNTR
1
)
t
WL
(CNTR
1
)
t
C
(S
CLK
)
t
WH
(S
CLK
)
t
WL
(S
CLK
)
t
su
(RxD–S
CLK
)
t
h
(S
CLK
–RxD)
Parameter
Limits
Unit
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
0
input cycle time
CNTR
0
, INT
0
, INT
1
, input “H” pulse width
CNTR
0
, INT
0
, INT
1
, input “L” pulse width
CNTR
1
input cycle time
CNTR
1
input “H” pulse width
CNTR
1
input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
In this time, bit 6 of the serial I/O control register (address 001A
16
) is set to “1” (clock synchronous serial I/O is selected).
When bit 6 of the serial I/O control register is “0” (clock asynchronous serial I/O is selected), the rating values are divided by 4.
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