參數(shù)資料
型號(hào)： M37281MFH-XXXSP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 76/172頁
文件大?。?/td> 1319K
代理商： M37281MFH-XXXSP
M37281MAH
–
XXXSP,M37281MFH
–
XXXSP,M37281MKH
–
XXXSP, M37281EKSP
Rev.1.01 2003.07.16 page 76 of 170
Fig. 8.11.10 Vertical Position Register 1i (i = 1 to 16)
The vertical start position for each block can be set in 1024 steps
(where each step is 1T
H
(T
H
: H
SYNC
cycle)) as values
“
00
16
”
to
“
FF
16
”
in vertical position register 1i (i = 1 to 16) (addresses 0220
16
to 022F
16
)
and values
“
00
16
”
to
“
03
16
”
in vertical position register 2i (i = 1 to 16)
(addresses 0230
16
to 023F
16
). The vertical position registers are
shown in Figures 8.11.10 and 8.11.11.
Fig. 8.11.11 Vertical Position Register 2i (i = 1 to 16)
b7b6b5b4b3b2b1b0
Vertical position register 1i (VP1i) (i = 1 to 16) [Addresses 0220
16
to 022F
16
]
B
0
to
7
Name
Functions
After reset R W
Vertical Position Register 1i
Control bits of
vertical display
start positions
(VP1i0 to VP1i7)
(See note 1)
Vertical display start positions
(low-order 8 bits)
TH
(setting value of low-order 2 bits of VP2i
16
2
+ setting value of low-order 4 bits of VP1i
16
1
+ setting value of low-order 4 bits of VP1i
16
0
)
R W
Notes 1:
Do not
“
00
16
”
and
“
01
16
”
to VP1i at VP2i =
“
00
16
.
”
2:
T
H
is cycle of H
SYNC
.
3:
VP2i is vertical position register 2i.
Indeterminate
b7b6b5b4b3b2b1b0
Vertical position register 2i (VP2i) (i = 1 to 16) [Addresses 0230
16
to 023F
16
]
B
0,
1
Name
Functions
After reset
R W
Indeterminate
Vertical Position Register 2i
Control bits of
vertical display
start positions
(VP2i0, VP2i1)
(See note 1)
Vertical display start positions
(high-order 2 bits)
TH
(setting value of low-order 2 bits of VP2i
16
2
+ setting value of low-order 4 bits of VP1i
16
1
+ setting value of low-order 4 bits of VP1i
16
0
)
R W
Nothing ic assigned. These bits are write disable bits.
When these bits are read out, the values are indeterminate.
2
to
7
R
—
Notes 1:
Do not set
“
00
16
”
and
“
01
16
”
to VP1i at VP2i =
“
00
16
.
”
2:
T
H
is cycle of H
SYNC
.
3:
VP1i is vertical position register 1i.
Indeterminate
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