參數(shù)資料
型號(hào)： M37281MFH-XXXSP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 46/172頁
文件大?。?/td> 1319K
代理商： M37281MFH-XXXSP
M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Rev.1.01 2003.07.16 page 46 of 170
8.7 PWM OUTPUT CIRCUIT
This microcomputer is equipped with eight 8-bit PWMs (PWM0–
PWM7). PWM0–PWM7 have the same circuit structure and an 8-bit
resolution with minimum resolution bit width of 4
μ
s and repeat pe-
riod of 1024
μ
s (for f(X
IN
) = 8 MHz) .
Figure 8.7.1 shows the PWM block diagram. The PWM timing gen-
erating circuit applies individual control signals to PWM0–PWM7 us-
ing f(X
IN
) divided by 2 as a reference signal.
8.7.1 Data Setting
When outputting PWM0–PWM7, set 8-bit output data to the PWMi
register (i means 0 to 7; addresses 0200
16
to 0207
16
).
8.7.2 Transmitting Data from Register to PWM
circuit
Data transfer from the PWM register to the PWM circuit is executed
at writing data to the register.
The signal output from the PWM output pin corresponds to the con-
tents of this register.
8.7.3 PWM Operation
The following explains PWM operation.
First, set the bit 0 of PWM mode register 1 (address 020A
16
) to “0”
(at reset, bit 0 is already set to “0” automatically), so that the PWM
count source is supplied.
PWM0–PWM3 are also used as pins P0
4
–P0
7
, PWM4–PWM6 are
also used as pins P0
0
–P0
2
, and PWM7 is also used as pin P0
3
re-
spectively. Set the corresponding bits of the port P0 direction reg-
ister to “1” (output mode). And select each output polarity by bit 3 of
PWM mode register 1 (address 020A
16
). Then, set bits 7 to 0 of
PWM mode register 2 to “1” (PWM output).
The PWM waveform is output from the PWM output pins by setting
these registers.
Figure 8.7.2 shows the PWM timing. One cycle (T) is composed of
256 (2
8
) segments. The 8 kinds of pulses, relative to the weight of
each bit (bits 0 to 7), are output inside the circuit during 1 cycle.
Refer to Figure 8.7.2 (a). The PWM outputs waveform which is the
logical sum (OR) of pulses corresponding to the contents of bits 0 to
7 of the PWM register. Several examples are shown in Figure 8.7.2
(b). 256 kinds of output (HIGH area: 0/256 to 255/256) are selected
by changing the contents of the PWM register. A length of entirely
HIGH cannot be output, i.e. 256/256.
8.7.4 Output after Reset
At reset, the output of port P0 is in the high-impedance state, and
the contents of the PWM register and the PWM circuit are unde-
fined. Note that after reset, the PWM output is undefined until setting
the PWM register.
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