參數(shù)資料
型號(hào)： M34570EDFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO36
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁(yè)數(shù)： 50/69頁(yè)
文件大?。?/td> 687K
代理商： M34570EDFP
Under
development
Preliminary Specifications REV.1.02
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
55
Bus
Bus Control
Signals, which are required to access to external devices, and software wait are provided as follows. The
signals are available in memory expansion mode and microprocessor mode only.
(1) Address Bus and Data Bus
_____
Address bus is assigned to access a 16M-byte address space with 24 control pins as A0 to A22 and A23.
_____
A23 is an inversed output of the highest-order address bit.
Data bus is a signal to input and output data. The DS register selects 8-bit data bus as D0 to D7 or 16-bit
data bus as D0 to D15 for each external space. When setting the BYTE pin to "H", data bus in the external
memory space 3 is set as an 8-bit data bus after reset. When setting the BYTE pin to "L", data bus in the
external memory space 3 is set as a 16-bit data bus.
When changing single-chip mode to memory expansion mode, address bus is indeterminate till access-
ing an external memory space.
When accessing a DRAM space with DRAMC, row addresses and column addresses are multiplexed
into A8 to A20.
(2) Chip-Select Signal
_____
The chip-select signal is shared with A0 to A22 and A23. The PM11 to PM10 bits in the PM1 register
determine chip-select space and the number of chip-select outputs. Four chip-select signals maximum
can be output.
_____
In microprocessor mode, the chip-select signal is not output after reset except A23 as chip-select signal.
"L" is output while CSi (i=0 to 3) accesses the corresponding external space. "H" is output when CSi
accesses internal space and another external memory space. Figure 1.7.2 shows an example of the
address bus and chip-select signal outputs.
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