參數(shù)資料
型號(hào): M34570EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO36
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù): 33/69頁
文件大?。?/td> 687K
代理商: M34570EDFP
36
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
SYMBOL
The symbols shown below are used in the following list of instruction function and machine instructions.
Symbol
A
B
DR
E
C2
SI
V1
V2
I1
W1
W2
W3
W5
K0
PU0
MR
X
Y
Z
DP
PC
PCH
PCL
SK
SP
CY
R1
R2
R3H
R3L
T1
T2
T3
T1F
T2F
T3F
Contents
Register A (4 bits)
Register B (4 bits)
Register D (3 bits)
Register E (8 bits)
Carrier wave output control register C2 (2 bits)
8-bit general-purpose register SI (8 bits)
Interrupt control register V1 (4 bits)
Interrupt control register V2 (4 bits)
Interrupt control register I1 (4 bits)
Timer control register W1 (4 bits)
Timer control register W2 (4 bits)
Timer control register W3 (4 bits)
Timer count value store register W5 (2 bits)
Key-on wakeup control register K0 (4 bits)
Pull-up control register PU0 (4 bits)
Clock control register MR (4 bits)
Register X (4 bits)
Register Y (4 bits)
Register Z (2 bits)
Data pointer (10 bits)
(It consists of registers X, Y, and Z)
Program counter (14 bits)
High-order 7 bits of program counter
Low-order 7 bits of program counter
Stack register (14 bits ! 8)
Stack pointer (3 bits)
Carry flag
Timer 1 reload register
Timer 2 reload register
Timer 3 reload register
Timer 1
Timer 2
Timer 3
Timer 1 interrupt request flag
Timer 2 interrupt request flag
Timer 3 interrupt request flag
Contents
Watchdog timer flag 1
Watchdog timer flag 2
Watchdog timer enable flag
Interrupt enable flag
External 0 interrupt request flag
Power down flag
Port D (10 bits)
Port P0 (4 bits)
Port P1 (4 bits)
Port P2 (2 bits)
Port P3 (4 bits)
Port P4 (4 bits)
Hexadecimal variable
Hexadecimal constant which represents the
immediate value
Hexadecimal constant which represents the
immediate value
Hexadecimal constant which represents the
immediate value
Binary notation of hexadecimal variable A
(same for others)
Direction of data movement
Data exchange between a register and memory
Decision of state shown before “?”
Contents of registers and memories
Negate, Flag unchanged after executing
instruction
RAM address pointed by the data pointer
Label indicating address a6 a5 a4 a3 a2 a1 a0
in page p5 p4 p3 p2 p1 p0
Hex. C + Hex. number x (also same for others)
Symbol
WDF1
WDF2
WEF
INTE
EXF0
P
D
P0
P1
P2
P3
P4
x
y
z
p
n
i
j
A3A2A1A0
?
( )
M(DP)
a
p, a
C
+
x
Note : The 4570 Group just invalidates the next instruction when a skip is performed. The contents of program counter is not
increased by 2. Accordingly, the number of cycles does not change even if skip is not performed. However, the cycle count
becomes “1” if the TABP p, RT, or RTS instruction is skipped.
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