參數(shù)資料
型號: M34552G8FP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 16/143頁
文件大?。?/td> 0K
代理商: M34552G8FP
8: REGISTERS
1-100
EPSON
S1D13505F00A HARDWARE FUNCTIONAL
SPECIFICATION (X23A-A-001-12)
bits 7–0
Ink/Cursor Start Address Select Bits [7:0]
These bits dene the start address for the Ink/Cursor buffer. The Ink/Cursor buffer must
be positioned where it does not conict with the image buffer and half-frame buffer – see
Memory Mapping for details.
The start address for the Ink/Cursor buffer is programmed as shown in the following table
where Display Buffer Size represents the size in bytes of the attached DRAM device (see
MD[7:6] in “Summary of Conguration Options”):
The Ink/Cursor image is stored contiguously. The address offset from the starting word of
line n to the starting word of line n+1 is calculated as follows:
Ink Address Offset (words) = REG[04h] + 1
Cursor Address Offset (words) = 8
bits 7–0
Alternate Frame Rate Modulation Select
Register that controls the alternate FRM scheme. When all bits are set to zero, the default
FRM is selected. For single passive, or dual passive with the half frame buffer enabled,
either the original or the alternate FRM scheme may be used. The alternate FRM scheme
may produce more visually appealing output. The following table shows the recom-
mended alternate FRM scheme values.
Ink/Cursor Start Address Select Register
REG[30h]
RW
Ink/Cursor
Start Address
Select
Bit 7
Ink/Cursor
Start Address
Select
Bit 6
Ink/Cursor
Start Address
Select
Bit 5
Ink/Cursor
Start Address
Select
Bit 4
Ink/Cursor
Start Address
Select
Bit 3
Ink/Cursor
Start Address
Select
Bit 2
Ink/Cursor
Start Address
Select
Bit 1
Ink/Cursor
Start Address
Select
Bit 0
Table 8-18 Ink/Cursor Start Address Encoding
Ink/Cursor Start Address Bits [7:0]
Start Address (Bytes)
0
Display Buffer Size - 1024
n = 255...1
Display Buffer Size - (n
× 8192)
Alternate FRM Register
REG[31h]
RW
Alternate FRM
Bit 7
Alternate FRM
Bit 6
Alternate FRM
Bit 5
Alternate FRM
Bit 4
Alternate FRM
Bit 3
Alternate FRM
Bit 2
Alternate FRM
Bit 1
Alternate FRM
Bit 0
Table 8-19 Recommended Alternate FRM Scheme
Panel Mode
Register Value
Single Passive
0000 0000 or 1111 1111
Dual Passive w/Half Frame Buffer Enabled
0000 0000 or 1111 1010
Dual Passive w/Half Frame Buffer Disabled
1111 1111
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