參數(shù)資料
型號: M34509G4HFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 94/145頁
文件大?。?/td> 1060K
代理商: M34509G4HFP
Rev.1.03
2009.07.27
page 50 of 140
REJ03B0147-0103
4509 Group
EPOF instruction +POF instruction
Q
S
R
SVDE instruction
Internal reset signal
Voltage drop detection circuit
Reset signal
VRST
Voltage drop detection circuit
Internal reset signal
Key-on wakeup signa
QS
R
+
VRST (reset release voltage)
+
-
VDD
Voltage drop detection circuit
Reset signal
Microcomputer starts operation after
on-chip oscillator (internal oscillator)
clock is counted 120 to 144 times.
VRST (reset occurrence voltage)
RESET pin
Note: Detection voltage hysteresis of voltage drop detection circuit is 0.1 V (Typ).
VOLTAGE DROP DETECTION CIRCUIT
(only for H version)
The built-in voltage drop detection circuit is designed to detect a
drop in voltage and to reset the microcomputer by outputting “L”
level to RESET pin if the supply voltage drops below a set value.
Fig. 44 Voltage drop detection reset circuit
Fig. 45 Voltage drop detection circuit operation waveform
Table 18 Voltage drop detection circuit operation state
(1) SVDE instruction
If the SVDE instruction is not executed (initial state), the voltage
drop detection circuit becomes invalid at RAM back-up mode.
When the SVDE instruction is executed, the voltage drop deteciton
circuit is valid even after system enters into the RAM back-up mode.
The SVDE instruction can be executed only once.
In order to release the execution of the SVDE instruction, the system
reset is required.
At CPU operating
Valid
At RAM back-up mode
Invalid
Valid
SVDE instruction not executed
SVDE instruction executed
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