參數(shù)資料
型號(hào): M34509G4HFP
元件分類(lèi): 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁(yè)數(shù): 26/145頁(yè)
文件大?。?/td> 1060K
代理商: M34509G4HFP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)當(dāng)前第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)
4509 Group
Rev.1.03
2009.07.27
page 119 of 140
REJ03B0147-0103
Skip condition
Datailed description
Carry
flag
CY
Continuous
description
Overflow = 0
(CY) = 0
(Mj(DP)) = 0
j = 0 to 3
(A) = (M(DP))
(A) = n
n = 0 to 15
0/1
1
0
0/1
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed and
other LA instructions coded continuously are skipped.
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 7 to 0 are the ROM pattern in ad-
dress (DR2 DR1 DR0 A3 A2 A1 A0)2 specified by registers A and D in page p. When UPTF is 1, Transfers bits
9, 8 to the low-order 2 bits (DR1, DR0) of register D, and “0” is stored to the least significant bit (DR2) of reg-
ister D.
When this instruction is executed, 1 stage of stack register (SK) is used.
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY re-
mains unchanged.
Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag CY.
Adds the value n in the immediate field to register A, and stores a result in register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Executes the next instruction when there is overflow as the result of operation.
Takes the AND operation between the contents of register A and the contents of M(DP), and stores the re-
sult in register A.
Takes the OR operation between the contents of register A and the contents of M(DP), and stores the result
in register A.
Sets (1) to carry flag CY.
Clears (0) to carry flag CY.
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one’s complement for register A’s contents in register A.
Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Sets (1) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
Clears (0) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
Skips the next instruction when the contents of bit j (bit specified by the value j in the immediate field) of
M(DP) is “0.”
Executes the next instruction when the contents of bit j of M(DP) is “1.”
Skips the next instruction when the contents of register A is equal to the contents of M(DP).
Executes the next instruction when the contents of register A is not equal to the contents of M(DP).
Skips the next instruction when the contents of register A is equal to the value n in the immediate field.
Executes the next instruction when the contents of register A is not equal to the value n in the immediate
field.
相關(guān)PDF資料
PDF描述
M34509G4-XXXFP 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
M34509G4H-XXXFP 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
M34510M4A-XXXSP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP32
M34510M2A-XXXFP 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO36
M34510E8-XXXFP 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO36
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M34509G4H-XXXFP 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34509G4-XXXFP 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34509T2-CPE 功能描述:DEV TOOL COMPACT EMULATOR: 4508/ RoHS:否 類(lèi)別:編程器,開(kāi)發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類(lèi)型:* 適用于相關(guān)產(chǎn)品:* 所含物品:*
M34512M2 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34512M2-XXXFP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER