參數(shù)資料
型號: M34509G4HFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 144/145頁
文件大?。?/td> 1060K
代理商: M34509G4HFP
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Rev.1.03
2009.07.27
page 96 of 140
REJ03B0147-0103
4509 Group
SZC (Skip if Zero, Carry flag)
0000101111
02F
11
(CY) = 0
Grouping:
Arithmetic operation
Description: Skips the next instruction when the con-
tents of carry flag CY is “0.”
After skipping, the CY flag remains un-
changed.
Executes the next instruction when the con-
tents of the CY flag is “1.“
Operation:
(CY) = 0 ?
SZB j (Skip if Zero, Bit)
00001000j
j
02j
11
(Mj(DP)) = 0
j = 0 to 3
Grouping:
Bit operation
Description: Skips the next instruction when the con-
tents of bit j (bit specified by the value j in
the immediate field) of M(DP) is “0.”
Executes the next instruction when the con-
tents of bit j of M(DP) is “1.”
Operation:
(Mj(DP)) = 0 ?
j = 0 to 3
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
SUPT (Set UPT flag)
0001011001
059
11
Grouping:
Other operation
Description: Sets (1) to the high-order bit reference en-
able flag UPTF. When the table reference
instruction (TABP p) is executed, the high-
order 2 bits of ROM reference data is
transferred to the low-order 2 bits of regis-
ter D.
Operation:
(UPTF) ← 1
SVDE (Set Voltage Detector Enable flag)
1010010011
293
11
Grouping:
Other operation
Description: Validates the voltage drop detection circuit
at RAM back-up.
Note:
This instruction can be executed only for
the H version.
Operation:
Voltage drop detection circuit valid at RAM back-up
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