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參數(shù)資料
| 型號： | M34509G4HFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| 封裝： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 117/145頁 |
| 文件大?。?/td> | 1060K |
| 代理商： | M34509G4HFP |
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4509 Group
Rev.1.03
2009.07.27
page 71 of 140
REJ03B0147-0103
CONTROL REGISTERS
I13
I12
I11
I10
INT pin input control bit (Note 2)
Interrupt valid waveform for INT pin/
return level selection bit (Note 2)
INT pin edge detection circuit control bit
INT pin
timer 1 control enable bit
Interrupt control register I1
R/W
TAI1/TI1A
at RAM back-up : state retained
at reset : 00002
INT pin input disabled
INT pin input enabled
Falling waveform (“L” level of INT pin is recognized with the SNZI0
instruction)/“L” level
Rising waveform (“H” level of INT pin is recognized with the SNZI0
instruction)/“H” level
One-sided edge detected
Both edges detected
Disabled
Enabled
0
1
0
1
0
1
0
1
Interrupt disabled (SNZSI instruction is valid)
Interrupt enabled (SNZSI instruction is invalid)
Interrupt disabled (SNZAD instruction is valid)
Interrupt enabled (SNZAD instruction is invalid)
This bit has no function, but read/write is enabled.
R/W
TAV2/TV2A
V13
V12
V11
V10
V23
V22
V21
V20
Serial interface interrupt enable bit
A/D interrupt enable bit
Not used
Interrupt control register V2
at RAM back-up : 00002
at reset : 00002
0
1
0
1
0
1
0
1
Interrupt control register V1
Timer 2 interrupt enable bit
Timer 1 interrupt enable bit
Not used
External 0 interrupt enable bit
Interrupt disabled (SNZT2 instruction is valid)
Interrupt enabled (SNZT2 instruction is invalid)
Interrupt disabled (SNZT1 instruction is valid)
Interrupt enabled (SNZT1 instruction is invalid)
This bit has no function, but read/write is enabled.
Interrupt disabled (SNZ0 instruction is valid)
Interrupt enabled (SNZ0 instruction is invalid)
0
1
0
1
0
1
0
1
at RAM back-up : 00002
at reset : 00002
R/W
TAV1/TV1A
at RAM back-up : 00002
at reset : 00002
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: When the contents of I12 and I13 are changed, the external interrupt request flag EXF0 may be set.
3: Main clock cannot be stopped when the main clock is selected for the operation source clock.
4: The stopped clock cannot be selected for the operation source clock. In order to switch the operation source clock, generate the oscillation stabiliz-
ing wait time by software first and set the oscillation of the destination clock to be enabled.
5: On-chip oscillator cannot be stopped when the on-chip oscillator is selected for the operation source clock.
MR3
Clock control register MR
Operation mode
Through mode (frequency not divided)
Frequency divided by 2 mode
Frequency divided by 4 mode
Frequency divided by 8 mode
Main clock (f(XIN)) oscillation enabled
Main clock (f(XIN)) oscillation stop
Main clock (f(XIN))
On-chip oscillator clock (f(RING))
at reset : 11012
at RAM back-up : 11012
MR3
0
1
R/W
TAMR/TMRA
Operation mode selection bits
0
1
0
1
MR2
0
1
0
1
MR1
MR0
MR2
0
1
On-chip oscillator (f(RING)) oscillation enabled
On-chip oscillator (f(RING)) oscillation stop
Clock control register RG
W
TRGA
at RAM back-up : 02
at reset : 02
RG0
Main clock f(XIN) control bit (Note 3)
Operation source clock selection bit (Note 4)
On-chip oscillator (f(RING)) control bit
(Note 5)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M34509G4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509G4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509T2-CPE | 功能描述:DEV TOOL COMPACT EMULATOR: 4508/ RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 內電路編程器、仿真器以及調試器 系列:- 產品變化通告:Development Systems Discontinuation 19/Jul/2010 標準包裝:1 系列:* 類型:* 適用于相關產品:* 所含物品:* |
| M34512M2 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34512M2-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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