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參數(shù)資料
| 型號： | M34509G4HFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| 封裝： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 66/145頁 |
| 文件大?。?/td> | 1060K |
| 代理商： | M34509G4HFP |
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4509 Group
Rev.1.03
2009.07.27
page 25 of 140
REJ03B0147-0103
(3) Notes on interrupts
Note [1] on bit 3 of register I1
When the input of the INT pin is controlled with the bit 3 of register
I1 in software, be careful about the following notes.
Depending on the input state of the P13/INT pin, the external 0 in-
terrupt request flag (EXF0) may be set when the bit 3 of register I1
is changed. In order to avoid the occurrence of an unexpected in-
terrupt, clear the bit 0 of register V1 to “0” (refer to Figure 18) and
then, change the bit 3 of register I1.
In addition, execute the SNZ0 instruction to clear the EXF0 flag to “0”
after executing at least one instruction (refer to Figure 18).
Also, set the NOP instruction for the case when a skip is performed
with the SNZ0 instruction (refer to Figure 18).
LA
4
; (02)
TV1A
; The SNZ0 instruction is valid ...........
LA
8
; (12)
TI1A
; Control of INT pin input is changed
NOP
...........................................................
SNZ0
; The SNZ0 instruction is executed
(EXF0 flag cleared)
NOP
...........................................................
: these bits are not used here.
Fig. 18 External 0 interrupt program example-1
Note [2] on bit 3 of register I1
When the bit 3 of register I1 is cleared to “0”, the RAM back-up
mode is selected and the input of INT pin is disabled, be careful
about the following notes.
When the INT pin input is disabled (register I13 = “0”), set the key-
on wakeup of INT pin to be invalid (register L10 = “0”) before
system enters to the RAM back-up mode. (refer to Figure 19).
LA
0
; (02)
TI1A
; INT key-on wakeup disabled ...........
DI
EPOF
POF
; RAM back-up
: these bits are not used here.
Fig. 19 External 0 interrupt program example-2
Note [3] on bit 2 of register I1
When the interrupt valid waveform of the P13/INT pin is changed
with the bit 2 of register I1 in software, be careful about the follow-
ing notes.
Depending on the input state of the P13/INT pin, the external 0 in-
terrupt request flag (EXF0) may be set when the bit 2 of register I1
is changed. In order to avoid the occurrence of an unexpected in-
terrupt, clear the bit 0 of register V1 to “0” (refer to Figure 20) and
then, change the bit 2 of register I1 is changed.
In addition, execute the SNZ0 instruction to clear the EXF0 flag to “0”
after executing at least one instruction (refer to Figure 20).
Also, set the NOP instruction for the case when a skip is performed
with the SNZ0 instruction (refer to Figure 20).
LA
4
; (02)
TV1A
; The SNZ0 instruction is valid ...........
LA
12
; (12)
TI1A
; Interrupt valid waveform is changed
NOP
...........................................................
SNZ0
; The SNZ0 instruction is executed
(EXF0 flag cleared)
NOP
...........................................................
: these bits are not used here.
Fig. 20 External 0 interrupt program example-3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34509G4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509G4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34509T2-CPE | 功能描述:DEV TOOL COMPACT EMULATOR: 4508/ RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 內(nèi)電路編程器、仿真器以及調(diào)試器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 19/Jul/2010 標(biāo)準(zhǔn)包裝:1 系列:* 類型:* 適用于相關(guān)產(chǎn)品:* 所含物品:* |
| M34512M2 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34512M2-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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