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參數(shù)資料
| 型號： | M30LW128D110ZA6T |
| 廠商： | 意法半導體 |
| 英文描述： | 128 Mbit (two 64Mbit, x8/x16, Uniform Block, Flash Memories) 3V Supply, Multiple Memory Product |
| 中文描述： | 128兆位（兩個64兆比特，x8/x16，統(tǒng)一座，快閃記憶體）3V電源，多記憶體產(chǎn)品 |
| 文件頁數(shù)： | 44/57頁 |
| 文件大?。?/td> | 860K |
| 代理商： | M30LW128D110ZA6T |
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M30LW128D
44/57
Table 29. Device Geometry Definition
Note: 1. In x8 mode A0 must be set to V
IL
. Otherwise, 00h will be output.
2. N/A = Not Applicable. Only the x16 mode is available with the LFBGA88 package.
Table 30. Block Status Register
Note: 1. BA specifies the block address location, A22-A17.
2. Not Supported.
Address
Data
Description
x16
x8
(1)
0027h
4Eh
18h
n where 2
n
is number of bytes memory Size
0028h
50h
02h
Device Interface
02h is the interface for M30LW128D devices delivered in
TSOP56 and TBGA64 packages (x8 and x16 modes
available)
N/A
(2)
01h
01h is the interface for M30LW128D devices delivered in
LFBGA88 packages (x16 mode available)
0029h
52h
00h
002Ah
54h
05h
Maximum number of bytes in Write Buffer, 2
n
002Bh
56h
00h
002Ch
58h
01h
Bit7-0 = number of Erase Block Regions in device
002Dh
5Ah
7Fh
Number (n-1) of Erase Blocks of identical size; n=128
002Eh
5Ch
00h
002Fh
5Eh
00h
Erase Block Region Information
x 256 bytes per Erase block (128K bytes)
0030h
60h
02h
Address
Data
Selected Block Information
(BA+2)h
(1)
bit0
0
Block Unprotected
1
Block Protected
bit1
0
Last erase operation ended successfully
(2)
1
Last erase operation not ended successfully
(2)
bit7-2
0
Reserved for future features
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