參數(shù)資料
型號(hào): M30L0R7000B0
廠商: 意法半導(dǎo)體
英文描述: 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
中文描述: 128兆位(8兆x16插槽,多銀行,多層次,多突發(fā)),1.8V電源快閃記憶體
文件頁(yè)數(shù): 1/83頁(yè)
文件大?。?/td> 1329K
代理商: M30L0R7000B0
1/83
December 2004
M30L0R7000T0
M30L0R7000B0
128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst)
1.8V Supply Flash Memory
FEATURES SUMMARY
SUPPLY VOLTAGE
V
DD
= 1.7V to 2.0V for program, erase and
read
V
DDQ
= 1.7V to 2.0V for I/O Buffers
V
PP
= 9V for fast program (12V tolerant)
SYNCHRONOUS / ASYNCHRONOUS READ
Synchronous Burst Read mode: 54MHz
Asynchronous Page Read mode
Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
10μs typical Word program time using
Buffer Program
MEMORY ORGANIZATION
Multiple Bank Memory Array: 8 Mbit
Banks
Parameter Blocks (Top or Bottom
location)
DUAL OPERATIONS
program/erase in one Bank while read in
others
No delay between read and write
operations
BLOCK LOCKING
All blocks locked at power-up
Any combination of blocks can be locked
with zero latency
WP for Block Lock-Down
Absolute Write Protection with V
PP
= V
SS
SECURITY
64 bit unique device number
2112 bit user programmable OTP Cells
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
Figure 1. Package
ELECTRONIC SIGNATURE
Manufacturer Code: 20h
Top Device Code: 88C4h.
Bottom Device Code: 88C5h
PACKAGE
– Compliant with Lead-Free Soldering
Processes
– Lead-Free Versions
TFBGA88 (ZAQ)
8 x 10mm
FBGA
相關(guān)PDF資料
PDF描述
M30L0R7000B0ZAQ 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000B0ZAQE 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000B0ZAQF 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory
M30L0R7000T0ZAQE AB 35C 7#12,28#16 PIN RECP
M30L0R7000T0ZAQF CAP 0.1UF 50V 10% X7R DIP-2 BULK R-MIL-C-39014
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