- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄359054 > M30L0R7000B0ZAQF (意法半導(dǎo)體) 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | M30L0R7000B0ZAQF |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| 中文描述： | 128兆位（8兆x16插槽，多銀行，多層次，多突發(fā)），1.8V電源快閃記憶體 |
| 文件頁(yè)數(shù)： | 1/83頁(yè) |
| 文件大?。?/td> | 1329K |
| 代理商： | M30L0R7000B0ZAQF |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)
1/83
December 2004
M30L0R7000T0
M30L0R7000B0
128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst)
1.8V Supply Flash Memory
FEATURES SUMMARY
SUPPLY VOLTAGE
–
V
DD
= 1.7V to 2.0V for program, erase and
read
–
V
DDQ
= 1.7V to 2.0V for I/O Buffers
–
V
PP
= 9V for fast program (12V tolerant)
SYNCHRONOUS / ASYNCHRONOUS READ
–
Synchronous Burst Read mode: 54MHz
–
Asynchronous Page Read mode
–
Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
–
10μs typical Word program time using
Buffer Program
MEMORY ORGANIZATION
–
Multiple Bank Memory Array: 8 Mbit
Banks
–
Parameter Blocks (Top or Bottom
location)
DUAL OPERATIONS
–
program/erase in one Bank while read in
others
–
No delay between read and write
operations
BLOCK LOCKING
–
All blocks locked at power-up
–
Any combination of blocks can be locked
with zero latency
–
WP for Block Lock-Down
–
Absolute Write Protection with V
PP
= V
SS
SECURITY
–
64 bit unique device number
–
2112 bit user programmable OTP Cells
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
■
■
■
■
■
■
■
■
■
■
Figure 1. Package
■
ELECTRONIC SIGNATURE
–
Manufacturer Code: 20h
–
Top Device Code: 88C4h.
–
Bottom Device Code: 88C5h
■
PACKAGE
– Compliant with Lead-Free Soldering
Processes
– Lead-Free Versions
TFBGA88 (ZAQ)
8 x 10mm
FBGA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30L0R7000T0ZAQE | AB 35C 7#12,28#16 PIN RECP |
| M30L0R7000T0ZAQF | CAP 0.1UF 50V 10% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000T0ZAQT | CAP 0.22UF 50V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000B0ZAQT | CAP 0.047UF 100V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R8000T0ZAQ | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R7000B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0ZAQ | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0ZAQE | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。