Contents for change
Revision
date
Version
deveopmen
Revision history
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (144-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
312
Page 206 Making power consumption electricity small --> addition
Page 209 Table 1.28.3
V
T+
– V
T-
SCL
2
-SCL
4
, SDA
2
-SDA
4
Addition
Page 210 Table 1.28.5
Note Change
Page 217 Table 1.28.22
t
RP
expression change
Page 221, 222, 224, 225, 227
Figure 1.28.4, 1.28.5, 1.28.7, 1.28.8, 1.28.10 addition
Page 229 Figure 1.28.12
Refresh timing (self refresh) RAS timing
Page 232
3V of electric characteristics addition
Page 248 Table 1.29.1
Data hold --> addition
Page 249 Figure 1.29.2
Package type 144P6Q --> 144P6Q-A
Page 250 Flash memory line 5 change
Page 251 Function outline Line 24 (Parallel ... function ) --> delate
Page 272 Standard serial I/O mode Line 26 externl device --> external device ( program-
mer)
Page 288 Figure1.31.21
programer --> peripheral unit ( programmer)
Page 43 Figure1.8.4 Note of the system clock control register 0-->addition
Page 44 Line 4 Note-->addition
Page 45 Table1.8.2 Note-->addition
Page 71 Line 9 "Address match interrupt is not generated with a start instruction of interrupt
routine."-->Delete
Page 73 (6) Precaution of Address mach interrupt-->addition
Page 79 Figure1.11.2 Note-->change
Page 87 Precaution for DMAC-->addition
Page 131 Figure1.16.11 Bit 7-->Must set to "1" in selecting IIC mode.
Page 152 Figure1.20.1 Bit 7-->Must set to "1" in selecting IIC mode.
Page 182 Addition
Page 207 (3) Address match interrupt in Interrupt precautions-->addition
Page 208 (2) DMAC-->addition
Page 209 Precautions for using CLK
OUT
pin-->addition
Page 212 Table1.28.3 Icc when clock stop Topr=25C
o
-->change
Page 214 Table1.28.6 External clock input HIGH and LOW pulse waidth 22-->20
External clock rise and fall time 10-->5
Page 217, 218 Table1.28.19, 20 t
h(BCLK-DB)
-->delete, t
w(WR)
-->addition
Page 220 Table1.28.22 t
h(BCLK-DB)
-5ns --> -7ns
Page 235 Table1.28.23 Icc when clock stop Topr=25C
o
-->change
Page 237 Table1.28.27 t
h(CAS-DB)
-->addition
Page 240, 241 Table1.28.39, 40 t
w(WR)
-->addition, t
h(BCLK-RD)
0ns-->-3ns
Page 242 Table1.28.41 t
d(AD-ALE)
=10
9
/(f
(BCLK)
X2)-20 -->10
9
/(f
(BCLK)
X2)-27
Page 243 Table1.28.42 t
h(BCLK-CAS)
0ns-->-3ns
Page 244 Figure1.28.15 t
ac1(RD-DB)
min-->max, t
ac1(AD-DB)
min-->max
Page 245 Figure1.28.16 t
ac2(RD-DB)
min-->max, t
ac2(AD-DB)
min-->max
Page 246, 255 Figure1.28.17 2 wait, Figure1.28.18 3 wait-->addition
Page 248 Figure1.28.19 t
ac3(AD-DB)
-->addition, t
su(DB-RD)
-->t
su(DB-BCLK)
, t
h(BCLK-RD)
0ns --
>-3ns, t
d(AD-ALE)
=(tcyc/2-20)ns--> ...
-27)ns
Page 249 Figure1.28.20 Addition
Page 250, 251 Figure1.28.21, 1.28.22 -->addition
Page 252 Figure1.28.23 t
h(BCLK-DB)
-->t
h(CAS-DB)
Rev.B3
17/6/'00