Contents for change
Revision
date
Version
deveopmen
Revision history
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (144-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
309
Pin 6 P9
1
/TB1
IN
/RxD
3
/SCL
3
--> P9
1
/TB1
IN
/RxD
3
/SCL
3
/STxD
3
Page 18 Figure 1.4.3
PM1 reset value "C0h" --> "00h"
Page 26 Figure 1.6.2 is insralled
PM1 reset value "C0h" --> "00h"
Divided to Mask and flash ROM version.
Page 85 DMA request bit Line 9 addition "In this case, DMAi request bit is cleared."
Page 85 Internal factors
The DMAi request bit is cleared to "0" when the DMA transfer starts. The DMAi
request bit can be cleared by the program. -->
The DMAi request bit is cleared to "0" when the DMA transfer starts. Even if DMA
transfer disable state (channel i transfer mode select bit is "00" and DMAi transfer
count register is "0"), The DMAi request bit is cleared to "0".
Page 85 External factors
When an external factor is selected, the DMAi request bit is cleared, in the same
way as the DMAi request bit is cleared for internal factors, when the DMA transfer
starts. The DMAi request bit can also be cleared by the program. -->
When an external factor is selected, the DMAi request bit is cleared, in the same
way as the DMAi request bit is cleared for internal factors, when the DMA transfer
starts or DMA transfer disable state.
Page 210 Timing requirement
10
9
X n
f(BCLK)
tac4
(CAS-DB)
= - 35[ns] --> tac4
(CAS-DB)
= f(BCLK)X2
Page 225 Figure 1.28.9
Memory Expansion Mode and Microprocessor Mode (Valid only with wait)
WR, WRL, WRH (separate bus) timing rasing edge is wrong
Page 1
DMAC...4 channels (trigger: 24 sources) --> 31 sources
Supply voltage
4.0 to 5.5V (f(XIN)=20MHz) Mask ROM version
4.2 to 5.5V (f(XIN)=20MHz) Flash memory version
2.7 to 5.5V (f(XIN)=10MHz) Mask ROM and flash memory version
Interrupt...4 software --> 5 software
Page 1,5 Table 1.1.1
Feature Memory capacity ROM 128 Kbytes --> (See ROM expansion figure.)
RAM 10K --> 10 to 24 Kbytes
Interrupt...4 software --> 5 software
Page 2 Figure 1.1.1
Note addition, Package: 144P6Q --> 144P6Q-A
Page 5 Figure 1.1.4, Table 1.1.2
M30805MG-XXXFP/GP addition
Page 6 Figure1.1.5 ROM capacity G:256 Kbytes addition
Page 7 P00 to P07
However, it is possible to select pull-up resistance presence to the usable port as I/
O port by setting. --> addition
CNVss
Connect it to the Vss pin when operating in single-chip or memory expan-
sion mode. Connect it to the Vcc pin when in microprocessor mode. -->
Connect it to the Vss pin when operating in single-chip or memory expan-
sion mode after reset. Connect it to the Vcc pin when in microprocessor
mode after reset.
BYTE
When operating in single-chip mode,connect this pin to VSS. --> When not
using the external bus,connect this pin to VSS.
Rev.B
14/3/'00
Rev.A4
00.02.29
10
9
X n