參數(shù)資料
型號： M306K9F8LRP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 16 X 16 MM, 0.40 MM PITCH, PLASTIC, TQFP-144
文件頁數(shù)： 79/101頁
文件大?。?/td> 2590K
代理商： M306K9F8LRP
Interrupt
Rev.1.00
Jun 06, 2003
page 61 of 290
M16C/6K9 Group
Key Input Interrupt 1
If any of the bits of key input interrupt 1 enable register (Address: 02F416) are set to “1”, the key input
interrupt 1 request occurs when a falling or a rising edge is input to one of the corresponding pins.
The effective input edge of key input interrupt 1 is determined by the edge selection bit of key input
interrupt 1 edge selection register (Address: 02F516). When the bit is set to “0”, at the falling edge,
when the bit is set to “1”, at the rising edge of the input signal to the corresponding pin, the interrupt
request occurs respectively.
When an effective rising edge or falling edge is input, “1” is set to the corresponding bit of P14 event
register (Address: 02F616). By reading the register after the interrupt occurs, the pin, which the effec-
tive edge is input, can be confirmed even if the status of that pin has been changed.
At the completion of the reading of P14 event register, the bits, whose value is “1” in reading, will be
cleared automatically. A dummy write clears the register too.
The registers, the block diagram and the timing of key input interrupt 1 are shown in Fig. DD-17, Fig.
DD-18 and Fig. DD-19 respectively.
After changing the effective edge by modifying key input interrupt 1 edge selection register, the value
of P14 event register and interrupt request bit may become “1”. A dummy write to the P14 event
register and a clear to the interrupt request bit should be done after changing the effective edge.
Same as key input interrupt edge selection register, when enabling/disabling key input interrupt 1 by
setting key input interrupt 1 enable register, the value of P14 event register and interrupt request bit
may become
“1”. A dummy write to the P14 event register and a clear to the interrupt request bit
should be done after the setting of enabling/disabling.
Fig.DD-16 P14 event register
Note : The register is "0" cleared by dummy write.
P14 event register
Bit name
Function
Bit symbol
W(Note)
R
Symbol
Address
When reset
KIN1EV
02F616
0016
KIN1EV0
b7
b6
b5
b4
b3
b2
b1
b0
P14 event bit0
0 : Without event
1 : with an event
0 : Without event
1 : with an event
0 : Without event
1 : with an event
0 : Without event
1 : with an event
0 : Without event
1 : with an event
P14 event bit1
P14 event bit2
P14 event bit3
P14 event bit4
P14 event bit5
0 : Without event
1 : with an event
KIN1EV1
KIN1EV2
KIN1EV3
KIN1EV4
KIN1EV5
0 : Without event
1 : with an event
P14 event bit6
P14 event bit7
0 : Without event
1 : with an event
KIN1EV6
KIN1EV7
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