參數(shù)資料
型號(hào)： M306K9F8LRP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 16 X 16 MM, 0.40 MM PITCH, PLASTIC, TQFP-144
文件頁(yè)數(shù)： 78/101頁(yè)
文件大小： 2590K
代理商： M306K9F8LRP
Interrupt
Rev.1.00
Jun 06, 2003
page 60 of 290
M16C/6K9 Group
______
NMI Interrupt
______
An NMI interrupt is generated when the input to the P85/NMI pin changes from “H” to “L”. The NMI interrupt
is a non-maskable external interrupt. The pin level can be checked in the port P85 register (bit 5 at address
03F016).
This pin cannot be used as a normal port input.
Key Input Interrupt 0
If the direction register of any of P50 to P57 is set for input and a falling edge is input to that port, a key input
interrupt 0 is generated. A key input interrupt 0 can also be used as a key-on wakeup function for cancelling
the wait mode or stop mode. Fig.DD-14 shows the block diagram of the key input interrupt 0. Note that if an
“L” level is input to any pin that has not been disabled for input, inputs to the other pins are not detected as an
interrupt.
________
NMI Interrupt
Interrupt control circuit
Key input interrupt 0 control register
(address 004D16)
Key input interrupt 0
request
P57/KI07
P56/KI06
P55/KI05
P54/KI04
Pull-up select bit
Port P57 direction register
Pull-up
transistor
Port P57 direction register
Port P56 direction
register
Port P55 direction
register
Port P54 direction
register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
P53/KI03
P52/KI02
P51/KI01
Port P53 direction
register
Port P52 direction
register
Port P51 direction
register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
P50/KI00
Port P50 direction
register
Pull-up
transistor
Fig.DD-15 Block diagram of key input interrupt 0
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