參數(shù)資料
型號： M2V28D20ATP-75
廠商： Mitsubishi Electric Corporation
英文描述： 128M Double Data Rate Synchronous DRAM
中文描述： 128M的雙數(shù)據(jù)速率同步DRAM
文件頁數(shù)： 35/36頁
文件大小： 1216K
代理商： M2V28D20ATP-75
35
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
The purpose of CLK suspend is power down. CKE is synchronous input except during the self-
refresh mode. A command at cycle is ignored. From CKE=H to normal function, DLL recovery time
is NOT required in the condition of the stable CLK operation during the power down mode.
[Power DOWN]
/CLK
CLK
Power Down by CKE
Command
PRE
CKE
Command
ACT
CKE
Standby Power Down
NOP
NOP
Valid
NOP
NOP
Valid
Active Power Down
DM is defined as the data mask for writes. During writes,DM masks input data word by word. DM
to write mask latency is 0.
[DM CONTROL]
DM Function(BL=8,CL=2)
Command
DQS
DQ
DM
WRITE
READ
D0
D1
D3
D4
D5
D6
D7
masked by DM=H
Don't Care
Q2
Q3
Q4
Q5
/CLK
CLK
Q0
Q1
Q6
tXPNR/tXPRD
相關(guān)PDF資料
PDF描述
M2V28D30ATP-10 353620600
M2V28D30ATP-75 128M Double Data Rate Synchronous DRAM
M2V28D40ATP-10 128M Double Data Rate Synchronous DRAM
M2V28D40ATP-75 128M Double Data Rate Synchronous DRAM
M2S28D20ATP 128M Double Data Rate Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2V28D30ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM
M2V28D30ATP-75 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM
M2V28D40ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM
M2V28D40ATP-75 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM
M2V28S20ATP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM
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