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參數(shù)資料
| 型號(hào)： | M2V28D20ATP-75 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 128M Double Data Rate Synchronous DRAM |
| 中文描述： | 128M的雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 10/36頁 |
| 文件大小： | 1216K |
| 代理商： | M2V28D20ATP-75 |
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10
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
FUNCTION TRUTH TABLE (continued)
ABBREVIATIONS:
H=High Level, L=Low Level, X=Don't Care
BA=Bank Address, RA=Row Address, CA=Column Address, NOP=No Operation
NOTES:
1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of
that bank.
3. Must satisfy bus contention, bus turn around, write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.
5. ILLEGAL if any bank is not idle.
ILLEGAL = Device operation and/or data-integrity are not guaranteed.
Current State
REFRESHING
/CS /RAS /CAS /WE Address
H
X
X
L
H
H
L
H
H
L
H
L
L
L
H
L
L
H
L
L
L
Command
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
Action
NOP (Idle after tRC)
NOP (Idle after tRC)
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Notes
X
H
L
X
H
L
H
X
X
BA
BA, CA, A10
BA, RA
BA, A10
X
Op-Code, Mode-
Add
X
X
BA
BA, CA, A10
BA, RA
BA, A10
X
Op-Code, Mode-
Add
L
L
L
L
MRS
ILLEGAL
H
L
L
L
L
L
L
X
H
H
H
L
L
L
X
H
H
L
H
H
L
X
H
L
X
H
L
H
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
NOP (Row Active after tRSC)
NOP (Row Active after tRSC)
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
L
L
L
L
MRS
ILLEGAL
MODE
REGISTER
SETTING
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M2V28D30ATP-10 | 353620600 |
| M2V28D30ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2S28D20ATP | 128M Double Data Rate Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2V28D30ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D30ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28S20ATP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM |
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