參數(shù)資料
型號(hào): M2V28D20ATP-75
廠商: Mitsubishi Electric Corporation
英文描述: 128M Double Data Rate Synchronous DRAM
中文描述: 128M的雙數(shù)據(jù)速率同步DRAM
文件頁(yè)數(shù): 16/36頁(yè)
文件大?。?/td> 1216K
代理商: M2V28D20ATP-75
16
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
ABSOLUTE MAXIMUM RATINGS
DC OPERATING CONDITIONS
(Ta=0 ~ 70
o
C, unless otherwise noted)
CAPACITANCE
(Ta=0 ~ 70
o
C, Vdd = VddQ = 2.5V + 0.2V, Vss = VssQ = 0V, unless otherwise noted)
Min. Max.
2.0
2.0
2.0
4.0
2.0
CI(A)
CI(C)
CI(K)
CI/O
CO(QF)
Input Capacitance, address pin
Input Capacitance, control pin
Input Capacitance, CLK pin
I/O Capacitance, I/O, DQS, DM pin
Output Capacitance, /QFC
3.0
3.0
3.0
5.0
3.0
pF
pF
pF
pF
pF
11
11
11
11
11
VI=1.25v
f=100MHz
VI=25mVrms
0.25
Notes
Limits
Symbol
Parameter
Test Condition
Unit
Delta
Cap.(Max.)
0.50
0.50
M in.
2.3
2.3
Typ.
2.5
2.5
M ax.
2.7
2.7
Vdd
VddQ
Vref
VIH(D C)
VIL(DC)
VIN(D C)
VID(D C) Input Differential V oltage, CLK and /CLK
VTT
I/O Termination Voltage
Supply Voltage
Supply Voltage for O utput
Input Reference Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Voltage Level, CLK and /CLK
V
V
V
V
V
V
V
V
0.49*V ddQ
Vref + 0.18
-0.3
-0.3
0.36
Vref - 0.04
0.50*V ddQ
0.51*V ddQ
VddQ+0.3
Vref - 0.18
VddQ + 0.3
VddQ + 0.6
Vref + 0.04
5
7
6
Notes
Limits
Symbol
Parameter
Unit
Symbol
Vdd
VddQ
VI
VO
IO
Pd
Topr
Tstg
Parameter
Supply Voltage
Supply Voltage for Output
Input Voltage
Output Voltage
Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Conditions
with respect to Vss
with respect to VssQ
with respect to Vss
with respect to VssQ
Ratings
-0.5 ~ 3.7
-0.5 ~ 3.7
-0.5 ~ Vdd+0.5
-0.5 ~ VddQ+0.5
50
1000
0 ~ 70
-65 ~ 150
Unit
V
V
V
V
mA
mW
o
C
o
C
Ta = 25
o
C
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