參數(shù)資料
型號(hào)： M25P10-AVMB6T/X
廠商： NUMONYX
元件分類： PROM
英文描述： FLASH 2.7V PROM, DSO8
封裝： 2 X 3 MM, ROHS COMPLIANT, UFDFPN-8
文件頁(yè)數(shù)： 5/51頁(yè)
文件大?。?/td> 1103K
代理商： M25P10-AVMB6T/X
M25P10-A
Operating features
13/51
4.7
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence. However, taking this signal Low does not terminate any
Write Status Register, Program or Erase cycle that is currently in progress.
To enter the Hold condition, the device must be selected, with Chip Select (S) Low.
The Hold condition starts on the falling edge of the Hold (HOLD) signal, provided that this
coincides with Serial Clock (C) being Low (as shown in Figure 5).
The Hold condition ends on the rising edge of the Hold (HOLD) signal, provided that this
coincides with Serial Clock (C) being Low.
If the falling edge does not coincide with Serial Clock (C) being Low, the Hold condition
starts after Serial Clock (C) next goes Low. Similarly, if the rising edge does not coincide
with Serial Clock (C) being Low, the Hold condition ends after Serial Clock (C) next goes
Low. (This is shown in Figure 5).
During the Hold condition, the Serial Data output (Q) is high impedance, and Serial Data
input (D) and Serial Clock (C) are Don’t care.
Normally, the device is kept selected, with Chip Select (S) driven Low, for the whole duration
of the Hold condition. This is to ensure that the state of the internal logic remains unchanged
from the moment of entering the Hold condition.
If Chip Select (S) goes High while the device is in the Hold condition, this has the effect of
resetting the internal logic of the device. To restart communication with the device, it is
necessary to drive Hold (HOLD) High, and then to drive Chip Select (S) Low. This prevents
the device from going back to the Hold condition.
Table 2.
Protected area sizes
Status
Register
content
Memory content
BP1
bit
BP0
bit
Protected area
Unprotected area
0
none
All sectors(1) (four sectors: 0, 1, 2 and 3)
1. The device is ready to accept a Bulk Erase instruction if, and only if, both Block Protect (BP1, BP0) bits are
0.
0
1
Upper quarter (sector 3)
Lower three-quarters (three sectors: 0 to 2)
1
0
Upper half (two sectors: 2 and 3)
Lower half (sectors 0 and 1)
1
All sectors (four sectors: 0, 1, 2 and 3) none
相關(guān)PDF資料
PDF描述
M25P10-AVME3 4 Mbit Uniform Sector, Serial Flash Memory
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M25P10-AVME3P 4 Mbit Uniform Sector, Serial Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25P10-AVME3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3G 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
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