參數(shù)資料
型號： M25P10-AVMB6T/X
廠商： NUMONYX
元件分類： PROM
英文描述： FLASH 2.7V PROM, DSO8
封裝： 2 X 3 MM, ROHS COMPLIANT, UFDFPN-8
文件頁數(shù)： 27/51頁
文件大?。?/td> 1103K
代理商： M25P10-AVMB6T/X
M25P10-A
Power-up and power-down
33/51
7
Power-up and power-down
At power-up and power-down, the device must not be selected (that is Chip Select (S) must
follow the voltage applied on VCC) until VCC reaches the correct value:
VCC(min) at power-up, and then for a further delay of tVSL
VSS at power-down
A safe configuration is provided in Section 3: SPI modes.
To avoid data corruption and inadvertent write operations during power-up, a Power On
Reset (POR) circuit is included. The logic inside the device is held reset while VCC is less
than the Power On Reset (POR) threshold voltage, VWI – all operations are disabled, and
the device does not respond to any instruction.
Moreover, the device ignores all Write Enable (WREN), Page Program (PP), Sector Erase
(SE), Bulk Erase (BE) and Write Status Register (WRSR) instructions until a time delay of
tPUW has elapsed after the moment that VCC rises above the VWI threshold. However, the
correct operation of the device is not guaranteed if, by this time, VCC is still below VCC(min).
No Write Status Register, Program or Erase instructions should be sent until the later of:
tPUW after VCC passed the VWI threshold
tVSL after VCC passed the VCC(min) level
These values are specified in Table 8.
If the delay, tVSL, has elapsed, after VCC has risen above VCC(min), the device can be
selected for read instructions even if the tPUW delay is not yet fully elapsed.
At power-up, the device is in the following state:
The device is in the Standby mode (not the Deep Power-down mode).
The Write Enable Latch (WEL) bit is reset.
The Write In Progress (WIP) bit is reset.
Normal precautions must be taken for supply rail decoupling, to stabilize the VCC supply.
Each device in a system should have the VCC rail decoupled by a suitable capacitor close to
the package pins. (Generally, this capacitor is of the order of 0.1 μF).
At power-down, when VCC drops from the operating voltage, to below the Power On Reset
(POR) threshold voltage, VWI, all operations are disabled and the device does not respond
to any instruction (the designer needs to be aware that if a power-down occurs while a
Write, Program or Erase cycle is in progress, some data corruption can result).
相關PDF資料
PDF描述
M25P10-AVME3 4 Mbit Uniform Sector, Serial Flash Memory
M25P10-AVME3G 4 Mbit Uniform Sector, Serial Flash Memory
M25P10-AVME3P 4 Mbit Uniform Sector, Serial Flash Memory
M25P10-AVME3T 4 Mbit Uniform Sector, Serial Flash Memory
M25P10-AVME3TG 4 Mbit Uniform Sector, Serial Flash Memory
相關代理商/技術參數(shù)
參數(shù)描述
M25P10-AVME3 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3G 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P10-AVME3TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
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