參數(shù)資料
型號: M12L32162A
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 1M x 16Bit x 2Banks Synchronous DRAM
中文描述: 100萬x 16Bit的X 2Banks同步DRAM
文件頁數(shù): 7/29頁
文件大?。?/td> 719K
代理商: M12L32162A
ES MT
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Preliminary
M12L32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Apr. 2007
Revision
:
0.3
7/29
-7
Parameter
Symbol
Min
Max
Unit
Note
CAS Latency =3
7
CLK cycle time
CAS Latency =2
t
CC
10
1000
ns
1
CAS Latency =3
-
6
CLK to valid
output delay
CAS Latency =2
t
SAC
-
6
ns
1
Output data hold time
t
OH
2.5
ns
2
CLK high pulse width
t
CH
2.5
ns
3
CLK low pulse width
t
CL
2.5
ns
3
Input setup time
t
SS
2
ns
3
Input hold time
t
SH
1
ns
3
CLK to output in Low-Z
t
SLZ
0
ns
2
CAS Latency =3
-
6
CLK to output in
Hi-Z
CAS latency =2
t
SHZ
-
6
ns
*All AC parameters are measured from half to half.
Note:
1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.
相關(guān)PDF資料
PDF描述
M12L32162A-7BG 1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-7TG 1M x 16Bit x 2Banks Synchronous DRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M12L32162A_0712 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A_09 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-5.5BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-5.5TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-6BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM