參數(shù)資料
型號: M12L32162A
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 1M x 16Bit x 2Banks Synchronous DRAM
中文描述: 100萬x 16Bit的X 2Banks同步DRAM
文件頁數(shù): 4/29頁
文件大?。?/td> 719K
代理商: M12L32162A
ES MT
DQ0 ~ 15
VDD/VSS
Preliminary
M12L32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Apr. 2007
Revision
:
0.3
4/29
Data Input / Output
Power Supply/Ground
Data inputs/outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide improved
noise immunity.
VDDQ/VSSQ
Data Output Power/Ground
N.C/RFU
No Connection/
Reserved for Future Use
This pin is recommended to be left No Connection on the device.
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
V
IN
,V
OUT
V
DD
,V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ + 150
0.7
50
Unit
V
V
C
°
W
MA
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Note:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
=0 to 70
C
°
)
Parameter
Symbol
V
DD
,V
DDQ
V
IH
V
IL
V
OH
V
OL
I
IL
I
OL
Min
3.0
2.0
-0.3
2.4
-
-5
-5
Typ
3.3
3.0
0
-
-
-
-
Max
3.6
V
DD
+0.3
0.8
-
0.4
5
5
Unit
V
V
V
V
V
uA
uA
Note
1
2
I
OH
=-2mA
I
OL
= 2mA
3
4
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
Note :
1.V
IH
(max) = 4.6V AC for pulse width
10ns acceptable.
2.V
IL
(min) = -1.5V AC for pulse width
10ns acceptable.
3.Any input 0V
V
IN
V
DD
+ 0.3V, all other pins are not under test = 0V.
4.Dout is disabled, 0V
V
OUT
VDD.
CAPACITANCE
(V
DD
= 3.3V, T
A
= 25
C
°
, f = 1MHz)
Pin
Symbol
C
CLK
Min
2.5
Max
4.0
Unit
pF
CLOCK
RAS , CAS ,
WE
, CS , CKE, LDQM,
UDQM
ADDRESS
DQ0 ~DQ15
C
IN
2.5
5.0
pF
C
ADD
C
OUT
2.5
4.0
5.0
6.5
pF
pF
相關(guān)PDF資料
PDF描述
M12L32162A-7BG 1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-7TG 1M x 16Bit x 2Banks Synchronous DRAM
M12L64164A-5BG 1M x 16 Bit x 4 Banks Synchronous DRAM
M12L64164A-6BG 1M x 16 Bit x 4 Banks Synchronous DRAM
M12L64164A-7BG 1M x 16 Bit x 4 Banks Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M12L32162A_0712 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A_09 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-5.5BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-5.5TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM
M12L32162A-6BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM